-尊龙凯时ag旗舰
#x000116c7
zhejiang hechuan technology co.,ltd.
424dd9020000000000003600000028000000100000000e000000010018000000000000000000232e0000232e00000000000000000000ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff6bb15adfeedbfcfdfb68b058d5e9d174b66470b4608dc3806bb15ae1efdefffffff2f8f07bba6d72b56359a847cae3c47fbc7174b665a5d09b50a33d8ac17ca5d09bffffffffffff82bd7479b86aaad3a1d3e8ce52a43fcae3c49aca8f81bd74b7d9af59a847c4e0beb3a283b5c29d72b563fcfefcffffffc6e1bf57a644c2dfbbeaf4e8f0f7eebeddb799c98e54a541f3f9f25eaa4df6faf5e2d7ccc2aa93a3cf9968af5768af57d3e8ce75b66661ac4f76b767a0cd9578b86a6eb35f7ebb6fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff
coupler
hcfa-coupler
hcfa-coupler
424dd9020000000000003600000028000000100000000e000000010018000000000000000000232e0000232e00000000000000000000ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff6bb15adfeedbfcfdfb68b058d5e9d174b66470b4608dc3806bb15ae1efdefffffff2f8f07bba6d72b56359a847cae3c47fbc7174b665a5d09b50a33d8ac17ca5d09bffffffffffff82bd7479b86aaad3a1d3e8ce52a43fcae3c49aca8f81bd74b7d9af59a847c4e0beb3a283b5c29d72b563fcfefcffffffc6e1bf57a644c2dfbbeaf4e8f0f7eebeddb799c98e54a541f3f9f25eaa4df6faf5e2d7ccc2aa93a3cf9968af5768af57d3e8ce75b66661ac4f76b767a0cd9578b86a6eb35f7ebb6fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff
hcqx-ec02-d4
hcqx-ec02-d4-v1.00.06,ethercat coupler
https://www.hcfa.cn/
2000
50000
5000
200
100
2000
coupler
5001
bool
1
dint
32
int
16
udint
32
uint
16
usint
8
ulint
64
real
32
string(13)
104
string(15)
120
dt1018
144
0
subindex 000
usint
8
0
ro
o
1
vendor id
udint
32
16
ro
o
2
product code
udint
32
48
ro
o
3
revision
udint
32
80
ro
o
4
serial number
udint
32
112
ro
o
dt1c00arr
usint
32
1
4
dt1c00
48
0
subindex 000
usint
8
0
ro
o
elements
dt1c00arr
32
16
ro
o
dt1c32
504
0
subindex 000
usint
8
0
ro
m
1
sync mode
uint
16
16
rw
o
2
cycle time
udint
32
32
ro
o
4
sync modes supported
uint
16
96
ro
o
5
minimum cycle time
udint
32
112
ro
o
6
calc and copy time
udint
32
144
ro
o
9
delay time
udint
32
224
ro
c
11
sm event missed counter
udint
32
288
ro
c
32
sync error
bool
1
496
ro
c
dt1c33
504
0
subindex 000
usint
8
0
ro
o
1
sync mode
uint
16
16
rw
o
2
cycle time
udint
32
32
ro
o
4
sync modes supported
uint
16
96
ro
o
5
minimum cycle time
udint
32
112
ro
o
6
calc and copy time
udint
32
144
ro
o
9
delay time
udint
32
224
ro
c
11
sm event missed counter
udint
32
288
ro
c
32
sync error
bool
1
496
ro
c
dt1c12arr
uint
4080
1
255
dt1c12
4096
0
subindex 000
usint
8
0
rw
o
elements
dt1c12arr
4080
16
rw
o
dt1c13arr
uint
4080
1
255
dt1c13
4096
0
subindex 000
usint
8
0
rw
o
elements
dt1c13arr
4080
16
rw
o
dt3010
48
0
largest sub-index supported
usint
8
0
ro
o
1
port 0 invalid frame counter
usint
8
16
ro
o
2
port 0 rx error counter
usint
8
24
ro
o
3
port 0 forwarded rx error counter
usint
8
32
ro
o
4
port 0 lost link counter
usint
8
40
ro
o
dt3011
48
0
largest sub-index supported
usint
8
0
ro
o
1
port 1 invalid frame counter
usint
8
16
ro
o
2
port 1 rx error counter
usint
8
24
ro
o
3
port 1 forwarded rx error counter
usint
8
32
ro
o
4
port 1 lost link counter
usint
8
40
ro
o
dt3012
48
0
largest sub-index supported
usint
8
0
ro
o
1
ecat processing unit error counter
usint
8
16
ro
o
2
pdi error cunter
usint
8
24
ro
o
3
watchdog counter process data
usint
8
32
ro
o
4
watchdog counter pdi
usint
8
40
ro
o
dt3016
80
0
subindex 000
usint
8
0
ro
o
1
rotary switchs value
uint
16
16
ro
o
2
configured station address
uint
16
32
ro
o
3
configured station alias
uint
16
48
ro
o
4
alias in eeprom
uint
16
64
rw
o
dtf000
48
0
subindex 000
usint
8
0
ro
o
1
index distance
uint
16
16
ro
o
2
maximum number of modules
uint
16
32
ro
o
dtf010arr
udint
512
1
16
dtf010
528
0
subindex 000
usint
8
0
ro
o
elements
dtf010arr
512
16
rw
o
dtf030arr
udint
512
1
16
dtf030
528
0
subindex 000
usint
8
0
rw
o
elements
dtf030arr
512
16
rw
o
dtf050arr
udint
512
1
16
dtf050
528
0
subindex 000
usint
8
0
ro
o
elements
dtf050arr
512
16
ro
o
dtf110
96
0
subindex 000
usint
8
0
ro
o
1
slave error
usint
8
16
ro
o
2
slave ethercat al station
uint
16
24
ro
o
3
slave ethercat al code
uint
16
40
ro
o
4
spi and configuration error
usint
8
56
ro
o
5
configuration error position
uint
16
64
ro
o
6
module error position
uint
16
80
ro
o
dtf800
48
0
subindex 000
usint
8
0
ro
o
1
configuration error run state
usint
8
16
rw
o
2
slave and module error run state
usint
8
24
rw
o
3
ethercat commucation error mode
usint
8
32
rw
o
4
esc error counter behavor
usint
8
40
rw
o
dt2012
64
0
subindex 000
usint
8
0
ro
1
reg300_reg301
uint
16
16
ro
1
2
reg302_reg303
uint
16
32
ro
1
3
reg310_reg311
uint
16
48
ro
1
dt2013
64
0
subindex 000
usint
8
0
ro
1
reg300_reg301
uint
16
16
ro
1
2
reg302_reg303
uint
16
32
ro
1
3
reg310_reg311
uint
16
48
ro
1
dt2014
64
0
subindex 000
usint
8
0
ro
1
reg300_reg301
uint
16
16
ro
1
2
reg302_reg303
uint
16
32
ro
1
3
reg310_reg311
uint
16
48
ro
1
dt2015
64
0
subindex 000
usint
8
0
ro
1
reg300_reg301
uint
16
16
ro
1
2
reg302_reg303
uint
16
32
ro
1
3
reg310_reg311
uint
16
48
ro
1
dt2016
64
0
subindex 000
usint
8
0
ro
1
reg300_reg301
uint
16
16
ro
1
2
reg302_reg303
uint
16
32
ro
1
3
reg310_reg311
uint
16
48
ro
1
dt2017
64
0
subindex 000
usint
8
0
ro
1
reg300_reg301
uint
16
16
ro
1
2
reg302_reg303
uint
16
32
ro
1
3
reg310_reg311
uint
16
48
ro
1
dt2018
64
0
subindex 000
usint
8
0
ro
1
reg300_reg301
uint
16
16
ro
1
2
reg302_reg303
uint
16
32
ro
1
3
reg310_reg311
uint
16
48
ro
1
dt2019
64
0
subindex 000
usint
8
0
ro
1
reg300_reg301
uint
16
16
ro
1
2
reg302_reg303
uint
16
32
ro
1
3
reg310_reg311
uint
16
48
ro
1
dt201a
64
0
subindex 000
usint
8
0
ro
1
reg300_reg301
uint
16
16
ro
1
2
reg302_reg303
uint
16
32
ro
1
3
reg310_reg311
uint
16
48
ro
1
dt201b
64
0
subindex 000
usint
8
0
ro
1
reg300_reg301
uint
16
16
ro
1
2
reg302_reg303
uint
16
32
ro
1
3
reg310_reg311
uint
16
48
ro
1
dt201c
64
0
subindex 000
usint
8
0
ro
1
reg300_reg301
uint
16
16
ro
1
2
reg302_reg303
uint
16
32
ro
1
3
reg310_reg311
uint
16
48
ro
1
dt201d
64
0
subindex 000
usint
8
0
ro
1
reg300_reg301
uint
16
16
ro
1
2
reg302_reg303
uint
16
32
ro
1
3
reg310_reg311
uint
16
48
ro
1
dt201e
64
0
subindex 000
usint
8
0
ro
1
reg300_reg301
uint
16
16
ro
1
2
reg302_reg303
uint
16
32
ro
1
3
reg310_reg311
uint
16
48
ro
1
dt201f
64
0
subindex 000
usint
8
0
ro
1
reg300_reg301
uint
16
16
ro
1
2
reg302_reg303
uint
16
32
ro
1
3
reg310_reg311
uint
16
48
ro
1
dt2020
64
0
subindex 000
usint
8
0
ro
1
reg300_reg301
uint
16
16
ro
1
2
reg302_reg303
uint
16
32
ro
1
3
reg310_reg311
uint
16
48
ro
1
dt2021
64
0
subindex 000
usint
8
0
ro
1
reg300_reg301
uint
16
16
ro
1
2
reg302_reg303
uint
16
32
ro
1
3
reg310_reg311
uint
16
48
ro
1
dt2022
64
0
subindex 000
usint
8
0
ro
1
reg300_reg301
uint
16
16
ro
1
2
reg302_reg303
uint
16
32
ro
1
3
reg310_reg311
uint
16
48
ro
1
dt2023
64
0
subindex 000
usint
8
0
ro
1
reg300_reg301
uint
16
16
ro
1
2
reg302_reg303
uint
16
32
ro
1
3
reg310_reg311
uint
16
48
ro
1
dt2024
64
0
subindex 000
usint
8
0
ro
1
reg300_reg301
uint
16
16
ro
1
2
reg302_reg303
uint
16
32
ro
1
3
reg310_reg311
uint
16
48
ro
1
dt2025
64
0
subindex 000
usint
8
0
ro
1
reg300_reg301
uint
16
16
ro
1
2
reg302_reg303
uint
16
32
ro
1
3
reg310_reg311
uint
16
48
ro
1
dt2026
64
0
subindex 000
usint
8
0
ro
1
reg300_reg301
uint
16
16
ro
1
2
reg302_reg303
uint
16
32
ro
1
3
reg310_reg311
uint
16
48
ro
1
dt2027
64
0
subindex 000
usint
8
0
ro
1
reg300_reg301
uint
16
16
ro
1
2
reg302_reg303
uint
16
32
ro
1
3
reg310_reg311
uint
16
48
ro
1
dt2028
64
0
subindex 000
usint
8
0
ro
1
reg300_reg301
uint
16
16
ro
1
2
reg302_reg303
uint
16
32
ro
1
3
reg310_reg311
uint
16
48
ro
1
dt2029
64
0
subindex 000
usint
8
0
ro
1
reg300_reg301
uint
16
16
ro
1
2
reg302_reg303
uint
16
32
ro
1
3
reg310_reg311
uint
16
48
ro
1
dt202a
64
0
subindex 000
usint
8
0
ro
1
reg300_reg301
uint
16
16
ro
1
2
reg302_reg303
uint
16
32
ro
1
3
reg310_reg311
uint
16
48
ro
1
dt202b
64
0
subindex 000
usint
8
0
ro
1
reg300_reg301
uint
16
16
ro
1
2
reg302_reg303
uint
16
32
ro
1
3
reg310_reg311
uint
16
48
ro
1
dt202c
64
0
subindex 000
usint
8
0
ro
1
reg300_reg301
uint
16
16
ro
1
2
reg302_reg303
uint
16
32
ro
1
3
reg310_reg311
uint
16
48
ro
1
dt202d
64
0
subindex 000
usint
8
0
ro
1
reg300_reg301
uint
16
16
ro
1
2
reg302_reg303
uint
16
32
ro
1
3
reg310_reg311
uint
16
48
ro
1
dt202e
64
0
subindex 000
usint
8
0
ro
1
reg300_reg301
uint
16
16
ro
1
2
reg302_reg303
uint
16
32
ro
1
3
reg310_reg311
uint
16
48
ro
1
dt202f
64
0
subindex 000
usint
8
0
ro
1
reg300_reg301
uint
16
16
ro
1
2
reg302_reg303
uint
16
32
ro
1
3
reg310_reg311
uint
16
48
ro
1
dt2030
64
0
subindex 000
usint
8
0
ro
1
reg300_reg301
uint
16
16
ro
1
2
reg302_reg303
uint
16
32
ro
1
3
reg310_reg311
uint
16
48
ro
1
dt2031
64
0
subindex 000
usint
8
0
ro
1
reg300_reg301
uint
16
16
ro
1
2
reg302_reg303
uint
16
32
ro
1
3
reg310_reg311
uint
16
48
ro
1
outputs
inputs
mboxstate
mboxout
mboxin
outputs
inputs
#x1bff
device status
#x3010
1
1
device and module link error
bool
#x3010
2
1
device and module status error
bool
#x3010
3
1
cycle too small
bool
#x3010
4
1
high temperature
bool
#x3010
5
1
low temperature
bool
#x3010
6
1
overvoltage
bool
#x3010
7
1
undervoltage
bool
#x3010
8
1
null
bool
#x3010
9
8
error slot
byte
ps
#x2000
00
0c
number of fault tolerance
synchron
sm-synchron
#x0
0
0
0
terminals
digital in
digital input terminals
digital out
digital output terminals
digital inout
digital inout terminals
analoge
analoge terminals
communication
communication terminals
24998
100
100
1024
080e00cc8813f0000000800000
0010800000118000
424dd9020000000000003600000028000000100000000e000000010018000000000000000000232e0000232e00000000000000000000ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff6bb15adfeedbfcfdfb68b058d5e9d174b66470b4608dc3806bb15ae1efdefffffff2f8f07bba6d72b56359a847cae3c47fbc7174b665a5d09b50a33d8ac17ca5d09bffffffffffff82bd7479b86aaad3a1d3e8ce52a43fcae3c49aca8f81bd74b7d9af59a847c4e0beb3a283b5c29d72b563fcfefcffffffc6e1bf57a644c2dfbbeaf4e8f0f7eebeddb799c98e54a541f3f9f25eaa4df6faf5e2d7ccc2aa93a3cf9968af5768af57d3e8ce75b66661ac4f76b767a0cd9578b86a6eb35f7ebb6fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff
hcqx-od16-pnp-d4
od16-pnp-d4,16 digtal output,dc24v
#x1600
output byte
#x1601
#x1602
#x7000
1
8
output 1
byte
#x7000
2
8
output 2
byte
#x1601
output bits
#x1600
#x1602
#x7001
1
1
output bit0
bool
#x7001
2
1
output bit1
bool
#x7001
3
1
output bit2
bool
#x7001
4
1
output bit3
bool
#x7001
5
1
output bit4
bool
#x7001
6
1
output bit5
bool
#x7001
7
1
output bit6
bool
#x7001
8
1
output bit7
bool
#x7001
9
1
output bit8
bool
#x7001
10
1
output bit9
bool
#x7001
11
1
output bit10
bool
#x7001
12
1
output bit11
bool
#x7001
13
1
output bit12
bool
#x7001
14
1
output bit13
bool
#x7001
15
1
output bit14
bool
#x7001
16
1
output bit15
bool
#x1602
output 16bit
#x1600
#x1601
#x7002
1
16
output1 16bit
uint
hcqx-md16-pnp-d4
md16-pnp-d4,8 digtal input and 8 digtal output,dc24v
#x1600
output byte
#x1601
#x7000
1
8
output 1
byte
0
1
8
#x1601
output bits
#x1600
#x7001
1
1
output bit0
bool
#x7001
2
1
output bit1
bool
#x7001
3
1
output bit2
bool
#x7001
4
1
output bit3
bool
#x7001
5
1
output bit4
bool
#x7001
6
1
output bit5
bool
#x7001
7
1
output bit6
bool
#x7001
8
1
output bit7
bool
0
9
1
output bit8
bool
0
10
1
output bit9
bool
0
11
1
output bit10
bool
0
12
1
output bit11
bool
0
13
1
output bit12
bool
0
14
1
output bit13
bool
0
15
1
output bit14
bool
0
16
1
output bit15
bool
#x1a00
input byte
#x1a01
#x6000
1
8
input 1
byte
0
1
8
#x1a01
input bits
#x1a00
#x6001
1
1
input bit0
bool
#x6001
2
1
input bit1
bool
#x6001
3
1
input bit2
bool
#x6001
4
1
input bit3
bool
#x6001
5
1
input bit4
bool
#x6001
6
1
input bit5
bool
#x6001
7
1
input bit6
bool
#x6001
8
1
input bit7
bool
0
9
1
input bit8
bool
0
10
1
input bit9
bool
0
11
1
input bit10
bool
0
12
1
input bit11
bool
0
13
1
input bit12
bool
0
14
1
input bit13
bool
0
15
1
input bit14
bool
0
16
1
input bit15
bool
hcqx-od32-pnp-d4
od32-pnp-d4,32 digtal output,dc24v
#x1600
output byte
#x1601
#x1602
#x7000
1
8
output 1
byte
#x7000
2
8
output 2
byte
#x7000
3
8
output 3
byte
#x7000
4
8
output 4
byte
#x1601
output bits
#x1600
#x1602
#x7001
1
1
output bit0
bool
#x7001
2
1
output bit1
bool
#x7001
3
1
output bit2
bool
#x7001
4
1
output bit3
bool
#x7001
5
1
output bit4
bool
#x7001
6
1
output bit5
bool
#x7001
7
1
output bit6
bool
#x7001
8
1
output bit7
bool
#x7001
9
1
output bit8
bool
#x7001
10
1
output bit9
bool
#x7001
11
1
output bit10
bool
#x7001
12
1
output bit11
bool
#x7001
13
1
output bit12
bool
#x7001
14
1
output bit13
bool
#x7001
15
1
output bit14
bool
#x7001
16
1
output bit15
bool
#x7001
17
1
output bit16
bool
#x7001
18
1
output bit17
bool
#x7001
19
1
output bit18
bool
#x7001
20
1
output bit19
bool
#x7001
21
1
output bit20
bool
#x7001
22
1
output bit21
bool
#x7001
23
1
output bit22
bool
#x7001
24
1
output bit23
bool
#x7001
25
1
output bit24
bool
#x7001
26
1
output bit25
bool
#x7001
27
1
output bit26
bool
#x7001
28
1
output bit27
bool
#x7001
29
1
output bit28
bool
#x7001
30
1
output bit29
bool
#x7001
31
1
output bit30
bool
#x7001
32
1
output bit31
bool
#x1602
output1 16bit
#x1600
#x1601
#x7002
1
16
output1 16bit
uint
#x7002
2
16
output2 16bit
uint
hcqx-md32-pnp-d4
md32-pnp-d4,16 digtal input and 16 digtal output,dc24v
#x1600
output bytes
#x1601
#x1602
#x7000
1
8
output 1
byte
#x7000
2
8
output 2
byte
#x1601
output bits
#x1600
#x1602
#x7001
1
1
output bit0
bool
#x7001
2
1
output bit1
bool
#x7001
3
1
output bit2
bool
#x7001
4
1
output bit3
bool
#x7001
5
1
output bit4
bool
#x7001
6
1
output bit5
bool
#x7001
7
1
output bit6
bool
#x7001
8
1
output bit7
bool
#x7001
9
1
output bit8
bool
#x7001
10
1
output bit9
bool
#x7001
11
1
output bit10
bool
#x7001
12
1
output bit11
bool
#x7001
13
1
output bit12
bool
#x7001
14
1
output bit13
bool
#x7001
15
1
output bit14
bool
#x7001
16
1
output bit15
bool
#x1602
output1 16bit
#x1600
#x1601
#x7002
1
16
output1 16bit
uint
#x1a00
input byte
#x1a01
#x1a02
#x6000
1
8
input 1
byte
#x6000
2
8
input 2
byte
#x1a01
input bits
#x1a00
#x1a02
#x6001
1
1
input bit0
bool
#x6001
2
1
input bit1
bool
#x6001
3
1
input bit2
bool
#x6001
4
1
input bit3
bool
#x6001
5
1
input bit4
bool
#x6001
6
1
input bit5
bool
#x6001
7
1
input bit6
bool
#x6001
8
1
input bit7
bool
#x6001
9
1
input bit8
bool
#x6001
10
1
input bit9
bool
#x6001
11
1
input bit10
bool
#x6001
12
1
input bit11
bool
#x6001
13
1
input bit12
bool
#x6001
14
1
input bit13
bool
#x6001
15
1
input bit14
bool
#x6001
16
1
input bit15
bool
#x1a02
input1 16bit
#x1a00
#x1a01
#x6002
1
16
input1 16bit
uint
hcqx-id16-d4
id16-d4,16 digtal input,dc24v
#x1a00
input byte
#x1a01
#x1a02
#x6000
1
8
input 1
byte
#x6000
2
8
input 2
byte
#x1a01
input bits
#x1a00
#x1a02
#x6001
1
1
input bit0
bool
#x6001
2
1
input bit1
bool
#x6001
3
1
input bit2
bool
#x6001
4
1
input bit3
bool
#x6001
5
1
input bit4
bool
#x6001
6
1
input bit5
bool
#x6001
7
1
input bit6
bool
#x6001
8
1
input bit7
bool
#x6001
9
1
input bit8
bool
#x6001
10
1
input bit9
bool
#x6001
11
1
input bit10
bool
#x6001
12
1
input bit11
bool
#x6001
13
1
input bit12
bool
#x6001
14
1
input bit13
bool
#x6001
15
1
input bit14
bool
#x6001
16
1
input bit15
bool
#x1a02
input 16bit
#x1a00
#x1a01
#x6002
1
16
input1 16bit
uint
hcqx-od16-d4
od16-d4,16 digtal output,dc24v
#x1600
output byte
#x1601
#x1602
#x7000
1
8
output 1
byte
#x7000
2
8
output 2
byte
#x1601
output bits
#x1600
#x1602
#x7001
1
1
output bit0
bool
#x7001
2
1
output bit1
bool
#x7001
3
1
output bit2
bool
#x7001
4
1
output bit3
bool
#x7001
5
1
output bit4
bool
#x7001
6
1
output bit5
bool
#x7001
7
1
output bit6
bool
#x7001
8
1
output bit7
bool
#x7001
9
1
output bit8
bool
#x7001
10
1
output bit9
bool
#x7001
11
1
output bit10
bool
#x7001
12
1
output bit11
bool
#x7001
13
1
output bit12
bool
#x7001
14
1
output bit13
bool
#x7001
15
1
output bit14
bool
#x7001
16
1
output bit15
bool
#x1602
output 16bit
#x1600
#x1601
#x7002
1
16
output1 16bit
uint
hcqx-md16-d4
md16-d4,8 digtal input and 8 digtal output,dc24v
#x1600
output byte
#x1601
#x7000
1
8
output 1
byte
0
1
8
#x1601
output bits
#x1600
#x7001
1
1
output bit0
bool
#x7001
2
1
output bit1
bool
#x7001
3
1
output bit2
bool
#x7001
4
1
output bit3
bool
#x7001
5
1
output bit4
bool
#x7001
6
1
output bit5
bool
#x7001
7
1
output bit6
bool
#x7001
8
1
output bit7
bool
0
9
1
output bit8
bool
0
10
1
output bit9
bool
0
11
1
output bit10
bool
0
12
1
output bit11
bool
0
13
1
output bit12
bool
0
14
1
output bit13
bool
0
15
1
output bit14
bool
0
16
1
output bit15
bool
#x1a00
input byte
#x1a01
#x6000
1
8
input 1
byte
0
1
8
#x1a01
input bits
#x1a00
#x6001
1
1
input bit0
bool
#x6001
2
1
input bit1
bool
#x6001
3
1
input bit2
bool
#x6001
4
1
input bit3
bool
#x6001
5
1
input bit4
bool
#x6001
6
1
input bit5
bool
#x6001
7
1
input bit6
bool
#x6001
8
1
input bit7
bool
0
9
1
input bit8
bool
0
10
1
input bit9
bool
0
11
1
input bit10
bool
0
12
1
input bit11
bool
0
13
1
input bit12
bool
0
14
1
input bit13
bool
0
15
1
input bit14
bool
0
16
1
input bit15
bool
hcqx-id32-d4
id32-d4,32 digtal input,dc24v
#x1a00
input byte
#x1a01
#x1a02
#x6000
1
8
input 1
byte
#x6000
2
8
input 2
byte
#x6000
3
8
input 3
byte
#x6000
4
8
input 4
byte
#x1a01
input bits
#x1a00
#x1a02
#x6001
1
1
input bit0
bool
#x6001
2
1
input bit1
bool
#x6001
3
1
input bit2
bool
#x6001
4
1
input bit3
bool
#x6001
5
1
input bit4
bool
#x6001
6
1
input bit5
bool
#x6001
7
1
input bit6
bool
#x6001
8
1
input bit7
bool
#x6001
9
1
input bit8
bool
#x6001
10
1
input bit9
bool
#x6001
11
1
input bit10
bool
#x6001
12
1
input bit11
bool
#x6001
13
1
input bit12
bool
#x6001
14
1
input bit13
bool
#x6001
15
1
input bit14
bool
#x6001
16
1
input bit15
bool
#x6001
17
1
input bit16
bool
#x6001
18
1
input bit17
bool
#x6001
19
1
input bit18
bool
#x6001
20
1
input bit19
bool
#x6001
21
1
input bit20
bool
#x6001
22
1
input bit21
bool
#x6001
23
1
input bit22
bool
#x6001
24
1
input bit23
bool
#x6001
25
1
input bit24
bool
#x6001
26
1
input bit25
bool
#x6001
27
1
input bit26
bool
#x6001
28
1
input bit27
bool
#x6001
29
1
input bit28
bool
#x6001
30
1
input bit29
bool
#x6001
31
1
input bit30
bool
#x6001
32
1
input bit31
bool
#x1a02
input 16bit
#x1a00
#x1a01
#x6002
1
16
input1 16bit
uint
#x6002
2
16
input2 16bit
uint
hcqx-od32-d4
od32-d4,32 digtal output,dc24v
#x1600
output byte
#x1601
#x1602
#x7000
1
8
output 1
byte
#x7000
2
8
output 2
byte
#x7000
3
8
output 3
byte
#x7000
4
8
output 4
byte
#x1601
output bits
#x1600
#x1602
#x7001
1
1
output bit0
bool
#x7001
2
1
output bit1
bool
#x7001
3
1
output bit2
bool
#x7001
4
1
output bit3
bool
#x7001
5
1
output bit4
bool
#x7001
6
1
output bit5
bool
#x7001
7
1
output bit6
bool
#x7001
8
1
output bit7
bool
#x7001
9
1
output bit8
bool
#x7001
10
1
output bit9
bool
#x7001
11
1
output bit10
bool
#x7001
12
1
output bit11
bool
#x7001
13
1
output bit12
bool
#x7001
14
1
output bit13
bool
#x7001
15
1
output bit14
bool
#x7001
16
1
output bit15
bool
#x7001
17
1
output bit16
bool
#x7001
18
1
output bit17
bool
#x7001
19
1
output bit18
bool
#x7001
20
1
output bit19
bool
#x7001
21
1
output bit20
bool
#x7001
22
1
output bit21
bool
#x7001
23
1
output bit22
bool
#x7001
24
1
output bit23
bool
#x7001
25
1
output bit24
bool
#x7001
26
1
output bit25
bool
#x7001
27
1
output bit26
bool
#x7001
28
1
output bit27
bool
#x7001
29
1
output bit28
bool
#x7001
30
1
output bit29
bool
#x7001
31
1
output bit30
bool
#x7001
32
1
output bit31
bool
#x1602
output 16bit
#x1600
#x1601
#x7002
1
16
output1 16bit
uint
#x7002
2
16
output2 16bit
uint
hcqx-md32-d4
md32-d4,16 digtal input and 16 digtal output,dc24v
#x1600
output bytes
#x1601
#x1602
#x7000
1
8
output 1
byte
#x7000
2
8
output 2
byte
#x1601
output bits
#x1600
#x1602
#x7001
1
1
output bit0
bool
#x7001
2
1
output bit1
bool
#x7001
3
1
output bit2
bool
#x7001
4
1
output bit3
bool
#x7001
5
1
output bit4
bool
#x7001
6
1
output bit5
bool
#x7001
7
1
output bit6
bool
#x7001
8
1
output bit7
bool
#x7001
9
1
output bit8
bool
#x7001
10
1
output bit9
bool
#x7001
11
1
output bit10
bool
#x7001
12
1
output bit11
bool
#x7001
13
1
output bit12
bool
#x7001
14
1
output bit13
bool
#x7001
15
1
output bit14
bool
#x7001
16
1
output bit15
bool
#x1602
output1 16bit
#x1600
#x1601
#x7002
1
16
output1 16bit
uint
#x1a00
input byte
#x1a01
#x1a02
#x6000
1
8
input 1
byte
#x6000
2
8
input 2
byte
#x1a01
input bits
#x1a00
#x1a02
#x6001
1
1
input bit0
bool
#x6001
2
1
input bit1
bool
#x6001
3
1
input bit2
bool
#x6001
4
1
input bit3
bool
#x6001
5
1
input bit4
bool
#x6001
6
1
input bit5
bool
#x6001
7
1
input bit6
bool
#x6001
8
1
input bit7
bool
#x6001
9
1
input bit8
bool
#x6001
10
1
input bit9
bool
#x6001
11
1
input bit10
bool
#x6001
12
1
input bit11
bool
#x6001
13
1
input bit12
bool
#x6001
14
1
input bit13
bool
#x6001
15
1
input bit14
bool
#x6001
16
1
input bit15
bool
#x1a02
input1 16bit
#x1a00
#x1a01
#x6002
1
16
input1 16bit
uint
hcqx-id16-d
id16-d,16 digtal input,dc24v
#x1a00
input byte
#x1a01
#x1a02
#x6000
1
8
input 1
byte
#x6000
2
8
input 2
byte
#x1a01
input bits
#x1a00
#x1a02
#x6001
1
1
input bit0
bool
#x6001
2
1
input bit1
bool
#x6001
3
1
input bit2
bool
#x6001
4
1
input bit3
bool
#x6001
5
1
input bit4
bool
#x6001
6
1
input bit5
bool
#x6001
7
1
input bit6
bool
#x6001
8
1
input bit7
bool
#x6001
9
1
input bit8
bool
#x6001
10
1
input bit9
bool
#x6001
11
1
input bit10
bool
#x6001
12
1
input bit11
bool
#x6001
13
1
input bit12
bool
#x6001
14
1
input bit13
bool
#x6001
15
1
input bit14
bool
#x6001
16
1
input bit15
bool
#x1a02
input 16bit
#x1a00
#x1a01
#x6002
1
16
input1 16bit
uint
hcqx-od16-d
od16-d,16 digtal output,dc24v
#x1600
output byte
#x1601
#x1602
#x7000
1
8
output 1
byte
#x7000
2
8
output 2
byte
#x1601
output bits
#x1600
#x1602
#x7001
1
1
output bit0
bool
#x7001
2
1
output bit1
bool
#x7001
3
1
output bit2
bool
#x7001
4
1
output bit3
bool
#x7001
5
1
output bit4
bool
#x7001
6
1
output bit5
bool
#x7001
7
1
output bit6
bool
#x7001
8
1
output bit7
bool
#x7001
9
1
output bit8
bool
#x7001
10
1
output bit9
bool
#x7001
11
1
output bit10
bool
#x7001
12
1
output bit11
bool
#x7001
13
1
output bit12
bool
#x7001
14
1
output bit13
bool
#x7001
15
1
output bit14
bool
#x7001
16
1
output bit15
bool
#x1602
output 16bit
#x1600
#x1601
#x7002
1
16
output1 16bit
uint
hcqx-md16-d
md16-d,8 digtal input and 8 digtal output,dc24v
#x1600
output 1
#x1601
#x7000
1
8
output 1
usint
0
1
8
#x1601
output bits
#x1600
#x7001
1
1
output bit0
bool
#x7001
2
1
output bit1
bool
#x7001
3
1
output bit2
bool
#x7001
4
1
output bit3
bool
#x7001
5
1
output bit4
bool
#x7001
6
1
output bit5
bool
#x7001
7
1
output bit6
bool
#x7001
8
1
output bit7
bool
0
9
1
output bit8
bool
0
10
1
output bit9
bool
0
11
1
output bit10
bool
0
12
1
output bit11
bool
0
13
1
output bit12
bool
0
14
1
output bit13
bool
0
15
1
output bit14
bool
0
16
1
output bit15
bool
#x1a00
input byte
#x1a01
#x6000
2
8
input 1
usint
0
1
8
#x1a01
input bits
#x1a00
#x6001
1
1
input bit0
bool
#x6001
2
1
input bit1
bool
#x6001
3
1
input bit2
bool
#x6001
4
1
input bit3
bool
#x6001
5
1
input bit4
bool
#x6001
6
1
input bit5
bool
#x6001
7
1
input bit6
bool
#x6001
8
1
input bit7
bool
0
9
1
input bit8
bool
0
10
1
input bit9
bool
0
11
1
input bit10
bool
0
12
1
input bit11
bool
0
13
1
input bit12
bool
0
14
1
input bit13
bool
0
15
1
input bit14
bool
0
16
1
input bit15
bool
hcqx-id32c-d2
id32c,32 digtal input,dc24v
#x1a00
input byte
#x1a01
#x1a02
#x6000
1
8
input 1
byte
#x6000
2
8
input 2
byte
#x6000
3
8
input 3
byte
#x6000
4
8
input 4
byte
#x1a01
input bits
#x1a00
#x1a02
#x6001
1
1
input bit0
bool
#x6001
2
1
input bit1
bool
#x6001
3
1
input bit2
bool
#x6001
4
1
input bit3
bool
#x6001
5
1
input bit4
bool
#x6001
6
1
input bit5
bool
#x6001
7
1
input bit6
bool
#x6001
8
1
input bit7
bool
#x6001
9
1
input bit8
bool
#x6001
10
1
input bit9
bool
#x6001
11
1
input bit10
bool
#x6001
12
1
input bit11
bool
#x6001
13
1
input bit12
bool
#x6001
14
1
input bit13
bool
#x6001
15
1
input bit14
bool
#x6001
16
1
input bit15
bool
#x6001
17
1
input bit16
bool
#x6001
18
1
input bit17
bool
#x6001
19
1
input bit18
bool
#x6001
20
1
input bit19
bool
#x6001
21
1
input bit20
bool
#x6001
22
1
input bit21
bool
#x6001
23
1
input bit22
bool
#x6001
24
1
input bit23
bool
#x6001
25
1
input bit24
bool
#x6001
26
1
input bit25
bool
#x6001
27
1
input bit26
bool
#x6001
28
1
input bit27
bool
#x6001
29
1
input bit28
bool
#x6001
30
1
input bit29
bool
#x6001
31
1
input bit30
bool
#x6001
32
1
input bit31
bool
#x1a02
input 16bit
#x1a00
#x1a01
#x6002
1
16
input1 16bit
uint
#x6002
2
16
input2 16bit
uint
hcqx-md32c-d2
md32c,16 digtal input and 16 digtal output,dc24v
#x1600
output bytes
#x1601
#x1602
#x7000
1
8
output 1
byte
#x7000
2
8
output 2
byte
#x1601
output bits
#x1600
#x1602
#x7001
1
1
output bit0
bool
#x7001
2
1
output bit1
bool
#x7001
3
1
output bit2
bool
#x7001
4
1
output bit3
bool
#x7001
5
1
output bit4
bool
#x7001
6
1
output bit5
bool
#x7001
7
1
output bit6
bool
#x7001
8
1
output bit7
bool
#x7001
9
1
output bit8
bool
#x7001
10
1
output bit9
bool
#x7001
11
1
output bit10
bool
#x7001
12
1
output bit11
bool
#x7001
13
1
output bit12
bool
#x7001
14
1
output bit13
bool
#x7001
15
1
output bit14
bool
#x7001
16
1
output bit15
bool
#x1602
output1 16bit
#x1600
#x1601
#x7002
1
16
output1 16bit
uint
#x1a00
input byte
#x1a01
#x1a02
#x6000
1
8
input 1
byte
#x6000
2
8
input 2
byte
#x1a01
input bits
#x1a00
#x1a02
#x6001
1
1
input bit0
bool
#x6001
2
1
input bit1
bool
#x6001
3
1
input bit2
bool
#x6001
4
1
input bit3
bool
#x6001
5
1
input bit4
bool
#x6001
6
1
input bit5
bool
#x6001
7
1
input bit6
bool
#x6001
8
1
input bit7
bool
#x6001
9
1
input bit8
bool
#x6001
10
1
input bit9
bool
#x6001
11
1
input bit10
bool
#x6001
12
1
input bit11
bool
#x6001
13
1
input bit12
bool
#x6001
14
1
input bit13
bool
#x6001
15
1
input bit14
bool
#x6001
16
1
input bit15
bool
#x1a02
input1 16bit
#x1a00
#x1a01
#x6002
1
16
input1 16bit
uint
hcqx-md32c-d2-pnp
md32c(pnp),16 digtal input and 16 digtal output,dc24v
#x1600
output bytes
#x1601
#x1602
#x7000
1
8
output 1
byte
#x7000
2
8
output 2
byte
#x1601
output bits
#x1600
#x1602
#x7001
1
1
output bit0
bool
#x7001
2
1
output bit1
bool
#x7001
3
1
output bit2
bool
#x7001
4
1
output bit3
bool
#x7001
5
1
output bit4
bool
#x7001
6
1
output bit5
bool
#x7001
7
1
output bit6
bool
#x7001
8
1
output bit7
bool
#x7001
9
1
output bit8
bool
#x7001
10
1
output bit9
bool
#x7001
11
1
output bit10
bool
#x7001
12
1
output bit11
bool
#x7001
13
1
output bit12
bool
#x7001
14
1
output bit13
bool
#x7001
15
1
output bit14
bool
#x7001
16
1
output bit15
bool
#x1602
output1 16bit
#x1600
#x1601
#x7002
1
16
output1 16bit
uint
#x1a00
input byte
#x1a01
#x1a02
#x6000
1
8
input 1
byte
#x6000
2
8
input 2
byte
#x1a01
input bits
#x1a00
#x1a02
#x6001
1
1
input bit0
bool
#x6001
2
1
input bit1
bool
#x6001
3
1
input bit2
bool
#x6001
4
1
input bit3
bool
#x6001
5
1
input bit4
bool
#x6001
6
1
input bit5
bool
#x6001
7
1
input bit6
bool
#x6001
8
1
input bit7
bool
#x6001
9
1
input bit8
bool
#x6001
10
1
input bit9
bool
#x6001
11
1
input bit10
bool
#x6001
12
1
input bit11
bool
#x6001
13
1
input bit12
bool
#x6001
14
1
input bit13
bool
#x6001
15
1
input bit14
bool
#x6001
16
1
input bit15
bool
#x1a02
input1 16bit
#x1a00
#x1a01
#x6002
1
16
input1 16bit
uint
hcqx-od32c-d2
od32c,32 digtal output,dc24v
#x1600
output byte
#x1601
#x1602
#x7000
1
8
output 1
byte
#x7000
2
8
output 2
byte
#x7000
3
8
output 3
byte
#x7000
4
8
output 4
byte
#x1601
output bits
#x1600
#x1602
#x7001
1
1
output bit0
bool
#x7001
2
1
output bit1
bool
#x7001
3
1
output bit2
bool
#x7001
4
1
output bit3
bool
#x7001
5
1
output bit4
bool
#x7001
6
1
output bit5
bool
#x7001
7
1
output bit6
bool
#x7001
8
1
output bit7
bool
#x7001
9
1
output bit8
bool
#x7001
10
1
output bit9
bool
#x7001
11
1
output bit10
bool
#x7001
12
1
output bit11
bool
#x7001
13
1
output bit12
bool
#x7001
14
1
output bit13
bool
#x7001
15
1
output bit14
bool
#x7001
16
1
output bit15
bool
#x7001
17
1
output bit16
bool
#x7001
18
1
output bit17
bool
#x7001
19
1
output bit18
bool
#x7001
20
1
output bit19
bool
#x7001
21
1
output bit20
bool
#x7001
22
1
output bit21
bool
#x7001
23
1
output bit22
bool
#x7001
24
1
output bit23
bool
#x7001
25
1
output bit24
bool
#x7001
26
1
output bit25
bool
#x7001
27
1
output bit26
bool
#x7001
28
1
output bit27
bool
#x7001
29
1
output bit28
bool
#x7001
30
1
output bit29
bool
#x7001
31
1
output bit30
bool
#x7001
32
1
output bit31
bool
#x1602
output 16bit
#x1600
#x1601
#x7002
1
16
output1 16bit
uint
#x7002
2
16
output2 16bit
uint
hcqx-od32c-d2-pnp
od32c(pnp),32 digtal output,dc24v
#x1600
output byte
#x1601
#x1602
#x7000
1
8
output 1
byte
#x7000
2
8
output 2
byte
#x7000
3
8
output 3
byte
#x7000
4
8
output 4
byte
#x1601
output bits
#x1600
#x1602
#x7001
1
1
output bit0
bool
#x7001
2
1
output bit1
bool
#x7001
3
1
output bit2
bool
#x7001
4
1
output bit3
bool
#x7001
5
1
output bit4
bool
#x7001
6
1
output bit5
bool
#x7001
7
1
output bit6
bool
#x7001
8
1
output bit7
bool
#x7001
9
1
output bit8
bool
#x7001
10
1
output bit9
bool
#x7001
11
1
output bit10
bool
#x7001
12
1
output bit11
bool
#x7001
13
1
output bit12
bool
#x7001
14
1
output bit13
bool
#x7001
15
1
output bit14
bool
#x7001
16
1
output bit15
bool
#x7001
17
1
output bit16
bool
#x7001
18
1
output bit17
bool
#x7001
19
1
output bit18
bool
#x7001
20
1
output bit19
bool
#x7001
21
1
output bit20
bool
#x7001
22
1
output bit21
bool
#x7001
23
1
output bit22
bool
#x7001
24
1
output bit23
bool
#x7001
25
1
output bit24
bool
#x7001
26
1
output bit25
bool
#x7001
27
1
output bit26
bool
#x7001
28
1
output bit27
bool
#x7001
29
1
output bit28
bool
#x7001
30
1
output bit29
bool
#x7001
31
1
output bit30
bool
#x7001
32
1
output bit31
bool
#x1602
output 16bit
#x1600
#x1601
#x7002
1
16
output1 16bit
uint
#x7002
2
16
output2 16bit
uint
hcqx-ad04-d2
ad04,4ch,input /-10v diff,0~20ma diff,16 bit
#x1600
ad error clear
#x8001
1
16
ad ch1. error clear
uint
#x8011
2
16
ad ch2. error clear
uint
#x8021
3
16
ad ch3. error clear
uint
#x8031
4
16
ad ch4. error clear
uint
#x1a00
ad status channel 1
#x6000
1
1
ad ch1. status_underrange
bit
#x6000
2
1
ad ch1. status_overrange
bit
#x6000
3
1
ad ch1. status_minimum limit
bit
#x0
0
1
padding
bit
#x6000
5
1
ad ch1. status_maximum limit
bit
#x0
0
1
padding
bit
#x6000
7
1
ad ch1. status_adc error
bit
#x6000
8
1
ad ch1. status_mutation detection
bit
#x0
0
8
padding
usint
#x1a01
ad value channel 1
#x6010
0
16
ad ch1. value
int
#x1a02
ad maximum value channel 1
#x6020
0
16
ad ch1. maximum value
int
#x1a03
ad minimum value channel 1
#x6030
0
16
ad ch1. minimum value
int
#x1a04
ad status channel 2
#x6040
1
1
ad ch2. status_underrange
bool
#x6040
2
1
ad ch2. status_overrange
bool
#x6040
3
1
ad ch2. status_minimum limit
bool
#x0
0
1
padding
#x6040
5
1
ad ch2. status_maximum limit
bool
#x0
0
1
padding
#x6040
7
1
ad ch2. status_adc error
bool
#x6040
8
1
ad ch2. status_mutation detection
bit
#x0
5
padding
#x0
14
1
padding
bool
#x0
15
1
padding
bool
#x0
16
1
padding
bool
#x1a05
ad value channel 2
#x6050
0
16
ad ch2. value
int
#x1a06
ad maximum value channel 2
#x6060
0
16
ad ch2. maximum value
int
#x1a07
ad minimum value channel 2
#x6070
0
16
ad ch2. minimum value
int
#x1a08
ad status channel 3
#x6080
1
1
ad ch3. status_underrange
bool
#x6080
2
1
ad ch3. status_overrange
bool
#x6080
3
1
ad ch3. status_minimum limit
bool
#x0
0
1
padding
#x6080
5
1
ad ch3. status_maximum limit
bool
#x0
0
1
padding
#x6080
7
1
ad ch3. status_adc error
bool
#x6080
8
1
ad ch3. status_mutation detection
bit
#x0
5
padding
#x0
14
1
padding
bool
#x0
15
1
padding
bool
#x0
16
1
padding
bool
#x1a09
ad value channel 3
#x6090
0
16
ad ch3. value
int
#x1a0a
ad maximum value channel 3
#x60a0
0
16
ad ch3. maximum value
int
#x1a0b
ad minimum value channel 3
#x60b0
0
16
ad ch3. minimum value
int
#x1a0c
ad status channel 4
#x60c0
1
1
ad ch4. status_underrange
bool
#x60c0
2
1
ad ch4. status_overrange
bool
#x60c0
3
1
ad ch4. status_minimum limit
bool
#x0
0
1
padding
#x60c0
5
1
ad ch4. status_maximum limit
bool
#x0
0
1
padding
#x60c0
7
1
ad ch4. status_adc error
bool
#x60c0
8
1
ad ch4. status_mutation detection
bit
#x0
5
padding
#x0
14
1
ch4. status_sync error
bool
#x0
15
1
ch4. status_txpdo state
bool
#x0
16
1
ch4. status_txpdo toggle
bool
#x1a0d
ad value channel 4
#x60d0
0
16
ad ch4. value
int
#x1a0e
ad maximum value channel 4
#x60e0
0
16
ad ch4. maximum value
int
#x1a0f
ad minimum value channel 4
#x60f0
0
16
ad ch4. minimum value
int
so
#x8000
01
00
ad ch1. input mode; 0:-10~10v; 1:0~10v; 2:-5~5v; 3:0~5v; 4:1~5v; 5:0~20ma; 6:4~20ma
ps
#x8000
09
01
ad ch1. enable channel
ps
#x8010
01
00
ad ch2. input mode; 0:-10~10v; 1:0~10v; 2:-5~5v; 3:0~5v; 4:1~5v; 5:0~20ma; 6:4~20ma
ps
#x8010
09
01
ad ch2. enable channel
ps
#x8020
01
00
ad ch3. input mode; 0:-10~10v; 1:0~10v; 2:-5~5v; 3:0~5v; 4:1~5v; 5:0~20ma; 6:4~20ma
ps
#x8020
09
01
ad ch3. enable channel
ps
#x8030
01
00
ad ch4. input mode; 0:-10~10v; 1:0~10v; 2:-5~5v; 3:0~5v; 4:1~5v; 5:0~20ma; 6:4~20ma
ps
#x8030
09
01
ad ch4. enable channel
bit2
2
bool
1
dint
32
int
16
udint
32
uint
16
usint
8
ulint
64
string(5)
40
string(20)
160
dt1011
32
0
subindex 000
usint
8
0
ro
o
1
subindex 001
bool
1
16
rw
o
dt1018
144
0
subindex 000
usint
8
0
ro
o
1
vendor id
udint
32
16
ro
o
2
product code
udint
32
48
ro
o
3
revision
udint
32
80
ro
o
4
serial number
udint
32
112
ro
o
dt1c00arr
usint
32
1
4
dt1c00
48
0
subindex 000
usint
8
0
ro
o
elements
dt1c00arr
32
16
ro
o
dt1c32
488
0
subindex 000
usint
8
0
ro
m
1
synchronization type
uint
16
16
rw
o
2
cycle time
udint
32
32
ro
o
4
synchronization types supported
uint
16
96
ro
o
5
minimum cycle time
udint
32
112
ro
o
6
calc and copy time
udint
32
144
ro
o
8
get cycle time
uint
16
208
rw
c
9
delay time
udint
32
224
ro
c
10
sync0 cycle time
udint
32
256
rw
o
11
sm-event missed
uint
16
288
ro
c
12
cycle time too small
uint
16
304
ro
c
32
sync error
bool
1
480
ro
c
dt1c33
488
0
subindex 000
usint
8
0
ro
m
1
synchronization type
uint
16
16
rw
o
2
cycle time
udint
32
32
ro
o
4
synchronization types supported
uint
16
96
ro
o
5
minimum cycle time
udint
32
112
ro
o
6
calc and copy time
udint
32
144
ro
o
8
get cycle time
uint
16
208
rw
c
9
delay time
udint
32
224
ro
c
10
sync0 cycle time
udint
32
256
rw
o
11
sm-event missed
uint
16
288
ro
c
12
cycle time too small
uint
16
304
ro
c
32
sync error
bool
1
480
ro
c
dt0800en03
usint
3
signed presentation
0
unsigned presentation
1
dt1600arr
udint
128
1
4
dt1a00arr
udint
384
1
12
dt1600
144
0
subindex 000
usint
8
0
ro
o
1
subindex 001
udint
32
16
ro
o
2
subindex 002
udint
32
48
ro
o
3
subindex 003
udint
32
80
ro
o
4
subindex 004
udint
32
112
ro
o
dt1a00
400
0
subindex 000
usint
8
0
ro
o
elements
dt1a00arr
384
16
ro
o
dt1a01
48
0
subindex 000
usint
8
0
ro
o
1
subindex 001
udint
32
16
ro
o
dt1c13arr
uint
256
1
16
dt1c13
272
0
subindex 000
usint
8
0
ro
o
elements
dt1c13arr
256
16
ro
o
dt6000
32
0
subindex 000
usint
8
0
ro
o
1
underrange
bool
1
16
ro
o
t
2
overrange
bool
1
17
ro
o
t
3
minimum limit
bool
1
18
ro
o
t
5
maximum limit
bool
1
20
ro
o
t
7
adc error
bool
1
22
ro
o
t
8
mutation detection
bool
1
23
ro
o
t
dt8000
128
0
subindex 000
usint
8
0
ro
o
1
input mode
usint
8
16
rw
o
1
9
enable channel
bool
1
24
rw
o
1
10
enable user scale
bool
1
25
rw
o
1
11
enable peak monitor
bool
1
26
rw
o
1
12
enable filter
bool
1
27
rw
o
1
13
enable minimum limit
bool
1
28
rw
o
1
14
enable maximum limit
bool
1
29
rw
o
1
15
enable mutation detection
bool
1
30
rw
o
1
17
user scale offset
int
16
32
rw
o
1
18
user scale gain
int
16
48
rw
o
1
19
minimum limit value
int
16
64
rw
o
1
20
maximum limit value
int
16
80
rw
o
1
21
filter settings
uint
16
96
rw
o
1
22
mutation detection value
uint
16
112
rw
o
1
dt8040
48
0
subindex 000
usint
8
0
ro
o
1
offset
int
16
16
ro
o
2
gain
int
16
32
ro
o
hcqx-ad04-d4
ad04-d4,4ch,input /-10v diff,0~20ma diff,16 bit
#x1600
ad status clear
#x7000
1
16
status clear
uint
#x1a00
txpdo-map1
#x6000
1
16
ad status
uint
#x1a01
txpdo-map2
#x6001
1
16
ad ch1.input
int
#x6011
1
16
ad ch2.input
int
#x6021
1
16
ad ch3.input
int
#x6031
1
16
ad ch4.input
int
so
#x8000
01
00
ad ch1. input mode; 0:-10~10v; 1:0~10v; 2:-5~5v; 3:0~5v; 4:1~5v; 5:0~20ma; 6:4~20ma
ps
#x8000
09
01
ad ch1. enable channel
ps
#x8010
01
00
ad ch2. input mode; 0:-10~10v; 1:0~10v; 2:-5~5v; 3:0~5v; 4:1~5v; 5:0~20ma; 6:4~20ma
ps
#x8010
09
01
ad ch2. enable channel
ps
#x8020
01
00
ad ch3. input mode; 0:-10~10v; 1:0~10v; 2:-5~5v; 3:0~5v; 4:1~5v; 5:0~20ma; 6:4~20ma
ps
#x8020
09
01
ad ch3. enable channel
ps
#x8030
01
00
ad ch4. input mode; 0:-10~10v; 1:0~10v; 2:-5~5v; 3:0~5v; 4:1~5v; 5:0~20ma; 6:4~20ma
ps
#x8030
09
01
ad ch4. enable channel
bit2
2
bool
1
dint
32
int
16
udint
32
uint
16
usint
8
ulint
64
string(5)
40
string(20)
160
dt1011
32
0
subindex 000
usint
8
0
ro
o
1
subindex 001
bool
1
16
rw
o
dt1018
144
0
subindex 000
usint
8
0
ro
o
1
vendor id
udint
32
16
ro
o
2
product code
udint
32
48
ro
o
3
revision
udint
32
80
ro
o
4
serial number
udint
32
112
ro
o
dt1c00arr
usint
32
1
4
dt1c00
48
0
subindex 000
usint
8
0
ro
o
elements
dt1c00arr
32
16
ro
o
dt1c32
488
0
subindex 000
usint
8
0
ro
m
1
synchronization type
uint
16
16
rw
o
2
cycle time
udint
32
32
ro
o
4
synchronization types supported
uint
16
96
ro
o
5
minimum cycle time
udint
32
112
ro
o
6
calc and copy time
udint
32
144
ro
o
8
get cycle time
uint
16
208
rw
c
9
delay time
udint
32
224
ro
c
10
sync0 cycle time
udint
32
256
rw
o
11
sm-event missed
uint
16
288
ro
c
12
cycle time too small
uint
16
304
ro
c
32
sync error
bool
1
480
ro
c
dt1c33
488
0
subindex 000
usint
8
0
ro
m
1
synchronization type
uint
16
16
rw
o
2
cycle time
udint
32
32
ro
o
4
synchronization types supported
uint
16
96
ro
o
5
minimum cycle time
udint
32
112
ro
o
6
calc and copy time
udint
32
144
ro
o
8
get cycle time
uint
16
208
rw
c
9
delay time
udint
32
224
ro
c
10
sync0 cycle time
udint
32
256
rw
o
11
sm-event missed
uint
16
288
ro
c
12
cycle time too small
uint
16
304
ro
c
32
sync error
bool
1
480
ro
c
dt0800en03
usint
3
signed presentation
0
unsigned presentation
1
dt1600arr
udint
128
1
4
dt1a00arr
udint
384
1
12
dt1600
144
0
subindex 000
usint
8
0
ro
o
1
subindex 001
udint
32
16
ro
o
2
subindex 002
udint
32
48
ro
o
3
subindex 003
udint
32
80
ro
o
4
subindex 004
udint
32
112
ro
o
dt1a00
400
0
subindex 000
usint
8
0
ro
o
elements
dt1a00arr
384
16
ro
o
dt1a01
48
0
subindex 000
usint
8
0
ro
o
1
subindex 001
udint
32
16
ro
o
dt1c13arr
uint
256
1
16
dt1c13
272
0
subindex 000
usint
8
0
ro
o
elements
dt1c13arr
256
16
ro
o
dt6000
32
0
subindex 000
usint
8
0
ro
o
1
underrange
bool
1
16
ro
o
t
2
overrange
bool
1
17
ro
o
t
3
minimum limit
bool
1
18
ro
o
t
5
maximum limit
bool
1
20
ro
o
t
7
adc error
bool
1
22
ro
o
t
8
mutation detection
bool
1
23
ro
o
t
dt8000
128
0
subindex 000
usint
8
0
ro
o
1
input mode
usint
8
16
rw
o
1
9
enable channel
bool
1
24
rw
o
1
10
enable user scale
bool
1
25
rw
o
1
11
enable peak monitor
bool
1
26
rw
o
1
12
enable filter
bool
1
27
rw
o
1
13
enable minimum limit
bool
1
28
rw
o
1
14
enable maximum limit
bool
1
29
rw
o
1
15
enable mutation detection
bool
1
30
rw
o
1
17
user scale offset
int
16
32
rw
o
1
18
user scale gain
int
16
48
rw
o
1
19
minimum limit value
int
16
64
rw
o
1
20
maximum limit value
int
16
80
rw
o
1
21
filter settings
uint
16
96
rw
o
1
22
mutation detection value
uint
16
112
rw
o
1
dt8040
48
0
subindex 000
usint
8
0
ro
o
1
offset
int
16
16
ro
o
2
gain
int
16
32
ro
o
dt8001
48
0
subindex 000
usint
8
0
ro
1
ch1.maximum value
int
16
16
ro
t
2
ch1.minimum value
int
16
32
ro
t
dt8011
48
0
subindex 000
usint
8
0
ro
1
ch2.maximum value
int
16
16
ro
t
2
ch2.minimum value
int
16
32
ro
t
dt8021
48
0
subindex 000
usint
8
0
ro
1
ch3.maximum value
int
16
16
ro
t
2
ch3.minimum value
int
16
32
ro
t
dt8031
48
0
subindex 000
usint
8
0
ro
1
ch4.maximum value
int
16
16
ro
t
2
ch4.minimum value
int
16
32
ro
t
hcqx-da04-d2
da04-d2,4ch,output /-10v,0-20ma,16 bit
#x1600
da channel 1
#x7010
1
16
da ch1.output
int
#x1601
da channel 2
#x7010
2
16
da ch2.output
int
#x1602
da channel 3
#x7010
3
16
da ch3.output
int
#x1603
da channel 4
#x7010
4
16
da ch4.output
int
#x1604
da error clear ch1..4
#x8001
1
16
da ch1. error clear
uint
#x8011
2
16
da ch2. error clear
uint
#x8021
3
16
da ch3. error clear
uint
#x8031
4
16
da ch4. error clear
uint
#x1a00
da status channel 1
#x6000
1
1
da ch1. status_underrange
bool
#x6000
2
1
da ch1. status_overrange
bool
#x6000
3
1
da ch1. status_analog power error
bool
#x0
0
13
padding
#x1a01
da status channel 2
#x6010
1
1
da ch2. status_underrange
bit
#x6010
2
1
da ch2. status_overrange
bit
#x6010
3
1
da ch2. status_analog power error
bit
#x0
0
13
padding
#x1a02
da status channel 3
#x6020
1
1
da ch3. status_underrange
bit
#x6020
2
1
da ch3. status_overrange
bit
#x6020
3
1
da ch3. status_analog power error
bit
#x0
0
13
padding
#x1a03
da status channel 4
#x6030
1
1
da ch4. status_underrange
bit
#x6030
2
1
da ch4. status_overrange
bit
#x6030
3
1
da ch4. status_analog power error
bit
#x0
0
13
padding
ps
#x8000
01
00
da ch1. output mode;0:-10~10v;1:0~10v;2:-5~5v;3:0~5v;4:1~5v;5:0~20ma;6:4~20ma
ps
#x8000
02
01
da ch1. enable channel
ps
#x8010
01
00
da ch2. output mode;0:-10~10v;1:0~10v;2:-5~5v;3:0~5v;4:1~5v;5:0~20ma;6:4~20ma
ps
#x8010
02
01
da ch2. enable channel
ps
#x8020
01
00
da ch3. output mode;0:-10~10v;1:0~10v;2:-5~5v;3:0~5v;4:1~5v;5:0~20ma;6:4~20ma
ps
#x8020
02
01
da ch3. enable channel
ps
#x8030
01
00
da ch4. output mode;0:-10~10v;1:0~10v;2:-5~5v;3:0~5v;4:1~5v;5:0~20ma;6:4~20ma
ps
#x8030
02
01
da ch4. enable channel
bit2
2
bool
1
dint
32
int
16
udint
32
uint
16
usint
8
array [0..3] of byte
usint
32
0
4
string(20)
160
string(5)
40
dt1011
32
0
subindex 000
usint
8
0
ro
1
restore default parameters
bool
1
16
rw
o
1
dt1018
144
0
subindex 000
usint
8
0
ro
o
1
vendor id
udint
32
16
ro
o
2
product code
udint
32
48
ro
o
3
revision
udint
32
80
ro
o
4
serial number
udint
32
112
ro
o
dt1c00arr
usint
32
1
4
dt1c00
48
0
subindex 000
usint
8
0
ro
o
elements
dt1c00arr
32
16
ro
o
dt1c32
488
0
subindex 000
usint
8
0
ro
m
1
synchronization type
uint
16
16
rw
o
2
cycle time
udint
32
32
ro
o
4
synchronization types supported
uint
16
96
ro
o
5
minimum cycle time
udint
32
112
ro
o
6
calc and copy time
udint
32
144
ro
o
8
get cycle time
uint
16
208
rw
c
9
delay time
udint
32
224
ro
c
10
sync0 cycle time
udint
32
256
rw
o
11
sm-event missed
uint
16
288
ro
c
12
cycle time too small
uint
16
304
ro
c
32
sync error
bool
1
480
ro
c
dt0800en03
usint
3
signed presentation
0
unsigned presentation
1
dt1600
48
0
subindex 000
usint
8
0
ro
o
1
subindex 001
udint
32
16
ro
o
dt1601
48
0
subindex 000
usint
8
0
ro
o
1
subindex 001
udint
32
16
ro
o
dt1602
48
0
subindex 000
usint
8
0
ro
o
1
subindex 001
udint
32
16
ro
o
dt1603
48
0
subindex 000
usint
8
0
ro
o
1
subindex 001
udint
32
16
ro
o
dt1c12arr
uint
80
1
5
dt1c12
96
0
subindex 000
usint
8
0
ro
o
elements
dt1c12arr
80
16
ro
o
dt7010
80
0
subindex 000
usint
8
0
ro
o
1
ch1.output
int
16
16
rw
o
r
2
ch2.output
int
16
32
rw
o
r
3
ch3.output
int
16
48
rw
o
r
4
ch4.output
int
16
64
rw
o
r
dt8000
192
0
subindex 000
usint
8
0
ro
o
1
output mode
uint
16
16
rw
o
1
2
enable channel
bool
1
32
rw
o
1
3
enable user scale
bool
1
33
rw
o
1
4
enable proportional adjustment
bool
1
34
rw
o
1
6
watchdog
uint
16
48
rw
o
1
7
error stop output mode
uint
16
64
rw
o
1
8
user output value
dint
32
80
rw
o
1
9
user proportional bias
int
16
112
rw
o
1
10
user proportional gain
dint
32
128
rw
o
1
11
user scale offset
int
16
160
rw
o
1
12
user scale gain
int
16
176
rw
o
1
dt8040
48
0
subindex 000
usint
8
0
ro
o
1
offset
int
16
16
ro
o
2
gain
int
16
32
ro
o
dt1604
144
0
subindex 000
usint
8
0
ro
o
1
subindex 001
udint
32
16
ro
o
2
subindex 002
udint
32
48
ro
o
3
subindex 003
udint
32
80
ro
o
4
subindex 004
udint
32
112
ro
o
dt6000
32
0
subindex 000
usint
8
0
ro
o
1
underrange
bool
1
16
ro
o
t
2
overrange
bool
1
17
ro
o
t
3
analog power error
bool
1
18
ro
o
t
dt1a00arr
udint
128
1
4
dt1c13arr
uint
64
1
4
dt1c13
80
0
subindex 000
usint
8
0
ro
o
elements
dt1c13arr
64
16
ro
o
dt1c33
488
0
subindex 000
usint
8
0
ro
m
1
synchronization type
uint
16
16
rw
o
2
cycle time
udint
32
32
ro
o
4
synchronization types supported
uint
16
96
ro
o
5
minimum cycle time
udint
32
112
ro
o
6
calc and copy time
udint
32
144
ro
o
8
get cycle time
uint
16
208
rw
c
9
delay time
udint
32
224
ro
c
10
sync0 cycle time
udint
32
256
rw
o
11
sm-event missed
uint
16
288
ro
c
12
cycle time too small
uint
16
304
ro
c
32
sync error
bool
1
480
ro
c
dt1a00
144
0
subindex 000
usint
8
0
ro
o
elements
dt1a00arr
128
16
ro
o
hcqx-da04-d4
da04-d4,4ch,output /-10v,0-20ma,16 bit
#x1600
da ch1 output
#x7000
1
16
da ch1.output
int
#x1601
da ch2 output
#x7010
1
16
da ch2.output
int
#x1602
da ch3 output
#x7020
1
16
da ch3.output
int
#x1603
da ch4 output
#x7030
1
16
da ch4.output
int
#x1604
da status clear
#x7001
0
16
da status clear
uint
#x1a00
da status
#x6000
1
16
da status
uint
ps
#x8000
01
00
da ch1. output mode;0:-10~10v;1:0~10v;2:-5~5v;3:0~5v;4:1~5v;5:0~20ma;6:4~20ma
ps
#x8000
02
01
da ch1. enable channel
ps
#x8010
01
00
da ch2. output mode;0:-10~10v;1:0~10v;2:-5~5v;3:0~5v;4:1~5v;5:0~20ma;6:4~20ma
ps
#x8010
02
01
da ch2. enable channel
ps
#x8020
01
00
da ch3. output mode;0:-10~10v;1:0~10v;2:-5~5v;3:0~5v;4:1~5v;5:0~20ma;6:4~20ma
ps
#x8020
02
01
da ch3. enable channel
ps
#x8030
01
00
da ch4. output mode;0:-10~10v;1:0~10v;2:-5~5v;3:0~5v;4:1~5v;5:0~20ma;6:4~20ma
ps
#x8030
02
01
da ch4. enable channel
bit2
2
bool
1
dint
32
int
16
udint
32
uint
16
usint
8
array [0..3] of byte
usint
32
0
4
string(20)
160
string(5)
40
dt1011
32
0
subindex 000
usint
8
0
ro
1
restore default parameters
bool
1
16
rw
o
1
dt1018
144
0
subindex 000
usint
8
0
ro
o
1
vendor id
udint
32
16
ro
o
2
product code
udint
32
48
ro
o
3
revision
udint
32
80
ro
o
4
serial number
udint
32
112
ro
o
dt1c00arr
usint
32
1
4
dt1c00
48
0
subindex 000
usint
8
0
ro
o
elements
dt1c00arr
32
16
ro
o
dt1c32
488
0
subindex 000
usint
8
0
ro
m
1
synchronization type
uint
16
16
rw
o
2
cycle time
udint
32
32
ro
o
4
synchronization types supported
uint
16
96
ro
o
5
minimum cycle time
udint
32
112
ro
o
6
calc and copy time
udint
32
144
ro
o
8
get cycle time
uint
16
208
rw
c
9
delay time
udint
32
224
ro
c
10
sync0 cycle time
udint
32
256
rw
o
11
sm-event missed
uint
16
288
ro
c
12
cycle time too small
uint
16
304
ro
c
32
sync error
bool
1
480
ro
c
dt0800en03
usint
3
signed presentation
0
unsigned presentation
1
dt1600
48
0
subindex 000
usint
8
0
ro
o
1
subindex 001
udint
32
16
ro
o
dt1601
48
0
subindex 000
usint
8
0
ro
o
1
subindex 001
udint
32
16
ro
o
dt1602
48
0
subindex 000
usint
8
0
ro
o
1
subindex 001
udint
32
16
ro
o
dt1603
48
0
subindex 000
usint
8
0
ro
o
1
subindex 001
udint
32
16
ro
o
dt1c12arr
uint
80
1
5
dt1c12
96
0
subindex 000
usint
8
0
ro
o
elements
dt1c12arr
80
16
ro
o
dt7010
80
0
subindex 000
usint
8
0
ro
o
1
ch1.output
int
16
16
rw
o
r
2
ch2.output
int
16
32
rw
o
r
3
ch3.output
int
16
48
rw
o
r
4
ch4.output
int
16
64
rw
o
r
dt8000
192
0
subindex 000
usint
8
0
ro
o
1
output mode
uint
16
16
rw
o
1
2
enable channel
bool
1
32
rw
o
1
3
enable user scale
bool
1
33
rw
o
1
4
enable proportional adjustment
bool
1
34
rw
o
1
6
watchdog
uint
16
48
rw
o
1
7
error stop output mode
uint
16
64
rw
o
1
8
user output value
dint
32
80
rw
o
1
9
user proportional bias
int
16
112
rw
o
1
10
user proportional gain
dint
32
128
rw
o
1
11
user scale offset
int
16
160
rw
o
1
12
user scale gain
int
16
176
rw
o
1
dt8040
48
0
subindex 000
usint
8
0
ro
o
1
offset
int
16
16
ro
o
2
gain
int
16
32
ro
o
dt1604
144
0
subindex 000
usint
8
0
ro
o
1
subindex 001
udint
32
16
ro
o
2
subindex 002
udint
32
48
ro
o
3
subindex 003
udint
32
80
ro
o
4
subindex 004
udint
32
112
ro
o
dt6000
32
0
subindex 000
usint
8
0
ro
o
1
underrange
bool
1
16
ro
o
t
2
overrange
bool
1
17
ro
o
t
3
analog power error
bool
1
18
ro
o
t
dt1a00arr
udint
128
1
4
dt1c13arr
uint
64
1
4
dt1c13
80
0
subindex 000
usint
8
0
ro
o
elements
dt1c13arr
64
16
ro
o
dt1c33
488
0
subindex 000
usint
8
0
ro
m
1
synchronization type
uint
16
16
rw
o
2
cycle time
udint
32
32
ro
o
4
synchronization types supported
uint
16
96
ro
o
5
minimum cycle time
udint
32
112
ro
o
6
calc and copy time
udint
32
144
ro
o
8
get cycle time
uint
16
208
rw
c
9
delay time
udint
32
224
ro
c
10
sync0 cycle time
udint
32
256
rw
o
11
sm-event missed
uint
16
288
ro
c
12
cycle time too small
uint
16
304
ro
c
32
sync error
bool
1
480
ro
c
dt1a00
144
0
subindex 000
usint
8
0
ro
o
elements
dt1a00arr
128
16
ro
o
hcqx-ts04-d4
ts04-d4,4ch,temperature measurement,24 bit
#x1a00
ts status
#x6000
1
1
ts ch1. burnout
bool
#x6000
2
1
ts ch2. burnout
bool
#x6000
3
1
ts ch3. burnout
bool
#x6000
4
1
ts ch4. burnout
bool
#x6000
5
1
ts ch1. overrange
bool
#x6000
6
1
ts ch2. overrange
bool
#x6000
7
1
ts ch3. overrange
bool
#x6000
8
1
ts ch4. overrange
bool
#x0
0
8
#x1a01
ts value
#x6010
0
16
ts ch1. value
int
#x6020
0
16
ts ch2. value
int
#x6030
0
16
ts ch3. value
int
#x6040
0
16
ts ch4. value
int
#x1a02
ts cold value
#x6050
0
16
ts ch1. cold value
int
#x6060
0
16
ts ch2. cold value
int
#x6070
0
16
ts ch3. cold value
int
#x6080
0
16
ts ch4. cold value
int
ps
#x8000
01
01
ts ch1. enable;0:disable;1:enable;
ps
#x8000
02
00
ts ch1. sensor type;0:pt100;1:pt1000;2:ni100;3:ni1000;4:b;5:e;6:j;7:k;8:n;9:r;10:s;11:t
ps
#x8010
01
01
ts ch2. enable;0:disable;1:enable;
ps
#x8010
02
00
ts ch2. sensor type;0:pt100;1:pt1000;2:ni100;3:ni1000;4:b;5:e;6:j;7:k;8:n;9:r;10:s;11:t
ps
#x8020
01
01
ts ch3. enable;0:disable;1:enable;
ps
#x8020
02
00
ts ch3. sensor type;0:pt100;1:pt1000;2:ni100;3:ni1000;4:b;5:e;6:j;7:k;8:n;9:r;10:s;11:t
ps
#x8030
01
01
ts ch4. enable;0:disable;1:enable;
ps
#x8030
02
00
ts ch4. sensor type;0:pt100;1:pt1000;2:ni100;3:ni1000;4:b;5:e;6:j;7:k;8:n;9:r;10:s;11:t
string(4)
32
usint
8
udint
32
uint
16
ulint
64
bool
1
int
16
dint
32
dt1a00
304
0
subindex 000
usint
8
0
ro
1
subindex 001
udint
32
16
ro
2
subindex 002
udint
32
48
ro
3
subindex 003
udint
32
80
ro
4
subindex 004
udint
32
112
ro
5
subindex 005
udint
32
144
ro
6
subindex 006
udint
32
176
ro
7
subindex 007
udint
32
208
ro
8
subindex 008
udint
32
240
ro
9
subindex 009
udint
32
272
ro
dt1a01
144
0
subindex 000
usint
8
0
ro
1
subindex 001
udint
32
16
ro
2
subindex 002
udint
32
48
ro
3
subindex 003
udint
32
80
ro
4
subindex 004
udint
32
112
ro
dt1a02
144
0
subindex 000
usint
8
0
ro
1
subindex 001
udint
32
16
ro
2
subindex 002
udint
32
48
ro
3
subindex 003
udint
32
80
ro
4
subindex 004
udint
32
112
ro
dt8000
48
0
subindex 000
usint
8
0
ro
1
enable
usint
8
16
rw
1
2
sensor setting
usint
8
24
rw
1
3
filter setting
uint
16
32
rw
1
dt8010
48
0
subindex 000
usint
8
0
ro
1
enable
usint
8
16
rw
1
2
sensor setting
usint
8
24
rw
1
3
filter setting
uint
16
32
rw
1
dt8020
48
0
subindex 000
usint
8
0
ro
1
enable
usint
8
16
rw
1
2
sensor setting
usint
8
24
rw
1
3
filter setting
uint
16
32
rw
1
dt8030
48
0
subindex 000
usint
8
0
ro
1
enable
usint
8
16
rw
1
2
sensor setting
usint
8
24
rw
1
3
filter setting
uint
16
32
rw
1
dt8040
24
0
subindex 000
usint
8
0
ro
1
cold type
usint
8
16
rw
1
dt8050
24
0
subindex 000
usint
8
0
ro
1
unit
usint
8
16
rw
1
dt8060
24
0
subindex 000
usint
8
0
ro
1
burnout enanle
usint
8
16
rw
1
dt8070
64
0
subindex 000
usint
8
0
ro
1
offset
int
16
16
rw
1
2
gain
dint
32
32
rw
1
dt8080
64
0
subindex 000
usint
8
0
ro
1
offset
int
16
16
rw
1
2
gain
dint
32
32
rw
1
dt8090
64
0
subindex 000
usint
8
0
ro
1
offset
int
16
16
rw
1
2
gain
dint
32
32
rw
1
dt80a0
64
0
subindex 000
usint
8
0
ro
1
offset
int
16
16
rw
1
2
gain
dint
32
32
rw
1
dt80b0
64
0
subindex 000
usint
8
0
ro
1
offset
int
16
16
ro
2
gain
dint
32
32
ro
dt80b1
64
0
subindex 000
usint
8
0
ro
1
offset
int
16
16
ro
2
gain
dint
32
32
ro
dt80b2
64
0
subindex 000
usint
8
0
ro
1
offset
int
16
16
ro
2
gain
dint
32
32
ro
dt80b3
64
0
subindex 000
usint
8
0
ro
1
offset
int
16
16
ro
2
gain
dint
32
32
ro
dt80b4
64
0
subindex 000
usint
8
0
ro
1
offset
int
16
16
ro
2
gain
dint
32
32
ro
dt80b5
64
0
subindex 000
usint
8
0
ro
1
offset
int
16
16
ro
2
gain
dint
32
32
ro
dt80b6
64
0
subindex 000
usint
8
0
ro
1
offset
int
16
16
ro
2
gain
dint
32
32
ro
dt80b7
64
0
subindex 000
usint
8
0
ro
1
offset
int
16
16
ro
2
gain
dint
32
32
ro
hcqx-ts04-d4-simple
ts04-d4(simple),4ch,temperature measurement,24 bit
#x1a00
ts status
#x6000
1
1
ts ch1. burnout
bool
#x6000
2
1
ts ch2. burnout
bool
#x6000
3
1
ts ch3. burnout
bool
#x6000
4
1
ts ch4. burnout
bool
#x6000
5
1
ts ch1. overrange
bool
#x6000
6
1
ts ch2. overrange
bool
#x6000
7
1
ts ch3. overrange
bool
#x6000
8
1
ts ch4. overrange
bool
#x0
0
8
#x1a01
ts value
#x6010
0
16
ts ch1. value
int
#x6020
0
16
ts ch2. value
int
#x6030
0
16
ts ch3. value
int
#x6040
0
16
ts ch4. value
int
ps
#x8000
01
01
ts ch1. enable;0:disable;1:enable;
ps
#x8000
02
00
ts ch1. sensor type;0:pt100;1:pt1000;2:ni100;3:ni1000;4:b;5:e;6:j;7:k;8:n;9:r;10:s;11:t
ps
#x8010
01
01
ts ch2. enable;0:disable;1:enable;
ps
#x8010
02
00
ts ch2. sensor type;0:pt100;1:pt1000;2:ni100;3:ni1000;4:b;5:e;6:j;7:k;8:n;9:r;10:s;11:t
ps
#x8020
01
01
ts ch3. enable;0:disable;1:enable;
ps
#x8020
02
00
ts ch3. sensor type;0:pt100;1:pt1000;2:ni100;3:ni1000;4:b;5:e;6:j;7:k;8:n;9:r;10:s;11:t
ps
#x8030
01
01
ts ch4. enable;0:disable;1:enable;
ps
#x8030
02
00
ts ch4. sensor type;0:pt100;1:pt1000;2:ni100;3:ni1000;4:b;5:e;6:j;7:k;8:n;9:r;10:s;11:t
string(4)
32
usint
8
udint
32
uint
16
ulint
64
bool
1
int
16
dint
32
dt1a00
304
0
subindex 000
usint
8
0
ro
1
subindex 001
udint
32
16
ro
2
subindex 002
udint
32
48
ro
3
subindex 003
udint
32
80
ro
4
subindex 004
udint
32
112
ro
5
subindex 005
udint
32
144
ro
6
subindex 006
udint
32
176
ro
7
subindex 007
udint
32
208
ro
8
subindex 008
udint
32
240
ro
9
subindex 009
udint
32
272
ro
dt1a01
144
0
subindex 000
usint
8
0
ro
1
subindex 001
udint
32
16
ro
2
subindex 002
udint
32
48
ro
3
subindex 003
udint
32
80
ro
4
subindex 004
udint
32
112
ro
dt1a02
144
0
subindex 000
usint
8
0
ro
1
subindex 001
udint
32
16
ro
2
subindex 002
udint
32
48
ro
3
subindex 003
udint
32
80
ro
4
subindex 004
udint
32
112
ro
dt8000
48
0
subindex 000
usint
8
0
ro
1
enable
usint
8
16
rw
1
2
sensor setting
usint
8
24
rw
1
3
filter setting
uint
16
32
rw
1
dt8010
48
0
subindex 000
usint
8
0
ro
1
enable
usint
8
16
rw
1
2
sensor setting
usint
8
24
rw
1
3
filter setting
uint
16
32
rw
1
dt8020
48
0
subindex 000
usint
8
0
ro
1
enable
usint
8
16
rw
1
2
sensor setting
usint
8
24
rw
1
3
filter setting
uint
16
32
rw
1
dt8030
48
0
subindex 000
usint
8
0
ro
1
enable
usint
8
16
rw
1
2
sensor setting
usint
8
24
rw
1
3
filter setting
uint
16
32
rw
1
dt8040
24
0
subindex 000
usint
8
0
ro
1
cold type
usint
8
16
rw
1
dt8050
24
0
subindex 000
usint
8
0
ro
1
unit
usint
8
16
rw
1
dt8060
24
0
subindex 000
usint
8
0
ro
1
burnout enanle
usint
8
16
rw
1
dt8070
64
0
subindex 000
usint
8
0
ro
1
offset
int
16
16
rw
1
2
gain
dint
32
32
rw
1
dt8080
64
0
subindex 000
usint
8
0
ro
1
offset
int
16
16
rw
1
2
gain
dint
32
32
rw
1
dt8090
64
0
subindex 000
usint
8
0
ro
1
offset
int
16
16
rw
1
2
gain
dint
32
32
rw
1
dt80a0
64
0
subindex 000
usint
8
0
ro
1
offset
int
16
16
rw
1
2
gain
dint
32
32
rw
1
dt80b0
64
0
subindex 000
usint
8
0
ro
1
offset
int
16
16
ro
2
gain
dint
32
32
ro
dt80b1
64
0
subindex 000
usint
8
0
ro
1
offset
int
16
16
ro
2
gain
dint
32
32
ro
dt80b2
64
0
subindex 000
usint
8
0
ro
1
offset
int
16
16
ro
2
gain
dint
32
32
ro
dt80b3
64
0
subindex 000
usint
8
0
ro
1
offset
int
16
16
ro
2
gain
dint
32
32
ro
dt80b4
64
0
subindex 000
usint
8
0
ro
1
offset
int
16
16
ro
2
gain
dint
32
32
ro
dt80b5
64
0
subindex 000
usint
8
0
ro
1
offset
int
16
16
ro
2
gain
dint
32
32
ro
dt80b6
64
0
subindex 000
usint
8
0
ro
1
offset
int
16
16
ro
2
gain
dint
32
32
ro
dt80b7
64
0
subindex 000
usint
8
0
ro
1
offset
int
16
16
ro
2
gain
dint
32
32
ro
hcqx-rs02-d4
rs02-d4,2ch,rs232/422/485
#x1600
com outputs channel 1
#x7000
1
8
ch.1 control
usint
#x7000
2
8
ch.1 send length
usint
#x7000
3
8
ch.1 output data 0
usint
#x7000
4
8
ch.1 output data 1
usint
#x7000
5
8
ch.1 output data 2
usint
#x7000
6
8
ch.1 output data 3
usint
#x7000
7
8
ch.1 output data 4
usint
#x7000
8
8
ch.1 output data 5
usint
#x7000
9
8
ch.1 output data 6
usint
#x7000
10
8
ch.1 output data 7
usint
#x7000
11
8
ch.1 output data 8
usint
#x7000
12
8
ch.1 output data 9
usint
#x7000
13
8
ch.1 output data 10
usint
#x7000
14
8
ch.1 output data 11
usint
#x7000
15
8
ch.1 output data 12
usint
#x7000
16
8
ch.1 output data 13
usint
#x7000
17
8
ch.1 output data 14
usint
#x7000
18
8
ch.1 output data 15
usint
#x7000
19
8
ch.1 output data 16
usint
#x7000
20
8
ch.1 output data 17
usint
#x7000
21
8
ch.1 output data 18
usint
#x7000
22
8
ch.1 output data 19
usint
#x7000
23
8
ch.1 output data 20
usint
#x7000
24
8
ch.1 output data 21
usint
#x7000
25
8
ch.1 output data 22
usint
#x7000
26
8
ch.1 output data 23
usint
#x7000
27
8
ch.1 output data 24
usint
#x7000
28
8
ch.1 output data 25
usint
#x7000
29
8
ch.1 output data 26
usint
#x7000
30
8
ch.1 output data 27
usint
#x7000
31
8
ch.1 output data 28
usint
#x7000
32
8
ch.1 output data 29
usint
#x7000
33
8
ch.1 output data 30
usint
#x7000
34
8
ch.1 output data 31
usint
#x1601
com outputs channel 2
#x7010
1
8
ch.2 control
usint
#x7010
2
8
ch.2 send length
usint
#x7010
3
8
ch.2 output data 0
usint
#x7010
4
8
ch.2 output data 1
usint
#x7010
5
8
ch.2 output data 2
usint
#x7010
6
8
ch.2 output data 3
usint
#x7010
7
8
ch.2 output data 4
usint
#x7010
8
8
ch.2 output data 5
usint
#x7010
9
8
ch.2 output data 6
usint
#x7010
10
8
ch.2 output data 7
usint
#x7010
11
8
ch.2 output data 8
usint
#x7010
12
8
ch.2 output data 9
usint
#x7010
13
8
ch.2 output data 10
usint
#x7010
14
8
ch.2 output data 11
usint
#x7010
15
8
ch.2 output data 12
usint
#x7010
16
8
ch.2 output data 13
usint
#x7010
17
8
ch.2 output data 14
usint
#x7010
18
8
ch.2 output data 15
usint
#x7010
19
8
ch.2 output data 16
usint
#x7010
20
8
ch.2 output data 17
usint
#x7010
21
8
ch.2 output data 18
usint
#x7010
22
8
ch.2 output data 19
usint
#x7010
23
8
ch.2 output data 20
usint
#x7010
24
8
ch.2 output data 21
usint
#x7010
25
8
ch.2 output data 22
usint
#x7010
26
8
ch.2 output data 23
usint
#x7010
27
8
ch.2 output data 24
usint
#x7010
28
8
ch.2 output data 25
usint
#x7010
29
8
ch.2 output data 26
usint
#x7010
30
8
ch.2 output data 27
usint
#x7010
31
8
ch.2 output data 28
usint
#x7010
32
8
ch.2 output data 29
usint
#x7010
33
8
ch.2 output data 30
usint
#x7010
34
8
ch.2 output data 31
usint
#x1a00
com inputs channel 1
#x6000
1
8
ch.1 status
usint
#x6000
2
8
ch.1 receive length
usint
#x6000
3
8
ch.1 input data 0
usint
#x6000
4
8
ch.1 input data 1
usint
#x6000
5
8
ch.1 input data 2
usint
#x6000
6
8
ch.1 input data 3
usint
#x6000
7
8
ch.1 input data 4
usint
#x6000
8
8
ch.1 input data 5
usint
#x6000
9
8
ch.1 input data 6
usint
#x6000
10
8
ch.1 input data 7
usint
#x6000
11
8
ch.1 input data 8
usint
#x6000
12
8
ch.1 input data 9
usint
#x6000
13
8
ch.1 input data 10
usint
#x6000
14
8
ch.1 input data 11
usint
#x6000
15
8
ch.1 input data 12
usint
#x6000
16
8
ch.1 input data 13
usint
#x6000
17
8
ch.1 input data 14
usint
#x6000
18
8
ch.1 input data 15
usint
#x6000
19
8
ch.1 input data 16
usint
#x6000
20
8
ch.1 input data 17
usint
#x6000
21
8
ch.1 input data 18
usint
#x6000
22
8
ch.1 input data 19
usint
#x6000
23
8
ch.1 input data 20
usint
#x6000
24
8
ch.1 input data 21
usint
#x6000
25
8
ch.1 input data 22
usint
#x6000
26
8
ch.1 input data 23
usint
#x6000
27
8
ch.1 input data 24
usint
#x6000
28
8
ch.1 input data 25
usint
#x6000
29
8
ch.1 input data 26
usint
#x6000
30
8
ch.1 input data 27
usint
#x6000
31
8
ch.1 input data 28
usint
#x6000
32
8
ch.1 input data 29
usint
#x6000
33
8
ch.1 input data 30
usint
#x6000
34
8
ch.1 input data 31
usint
#x1a01
com inputs channel 2
#x6010
1
8
ch.2 status
usint
#x6010
2
8
ch.2 receive length
usint
#x6010
3
8
ch.2 input data 0
usint
#x6010
4
8
ch.2 input data 1
usint
#x6010
5
8
ch.2 input data 2
usint
#x6010
6
8
ch.2 input data 3
usint
#x6010
7
8
ch.2 input data 4
usint
#x6010
8
8
ch.2 input data 5
usint
#x6010
9
8
ch.2 input data 6
usint
#x6010
10
8
ch.2 input data 7
usint
#x6010
11
8
ch.2 input data 8
usint
#x6010
12
8
ch.2 input data 9
usint
#x6010
13
8
ch.2 input data 10
usint
#x6010
14
8
ch.2 input data 11
usint
#x6010
15
8
ch.2 input data 12
usint
#x6010
16
8
ch.2 input data 13
usint
#x6010
17
8
ch.2 input data 14
usint
#x6010
18
8
ch.2 input data 15
usint
#x6010
19
8
ch.2 input data 16
usint
#x6010
20
8
ch.2 input data 17
usint
#x6010
21
8
ch.2 input data 18
usint
#x6010
22
8
ch.2 input data 19
usint
#x6010
23
8
ch.2 input data 20
usint
#x6010
24
8
ch.2 input data 21
usint
#x6010
25
8
ch.2 input data 22
usint
#x6010
26
8
ch.2 input data 23
usint
#x6010
27
8
ch.2 input data 24
usint
#x6010
28
8
ch.2 input data 25
usint
#x6010
29
8
ch.2 input data 26
usint
#x6010
30
8
ch.2 input data 27
usint
#x6010
31
8
ch.2 input data 28
usint
#x6010
32
8
ch.2 input data 29
usint
#x6010
33
8
ch.2 input data 30
usint
#x6010
34
8
ch.2 input data 31
usint
#x1a02
ch.1 data bytes in buffer
#x8001
1
16
ch.1 data bytes in send buffer
uint
#x8001
2
16
ch.1 data bytes in receive buffer
uint
#x1a03
ch.2 data bytes in buffer
#x8011
1
16
ch.2 data bytes in send buffer
uint
#x8011
2
16
ch.2 data bytes in receive buffer
uint
ps
#x8000
01
0000
rs ch1. physics connection
ps
#x8000
02
0400
rs ch1. baud rate
ps
#x8000
03
0600
rs ch1. data frame
ps
#x8000
04
0000
rs ch1. enable terminal resistance
ps
#x8000
05
0000
rs ch1. enable send fifo date continuous
ps
#x8000
06
0100
rs ch1. enable transfer rate optimization
ps
#x8010
01
0000
rs ch2. physics connection
ps
#x8010
02
0400
rs ch2. baud rate
ps
#x8010
03
0600
rs ch2. data frame
ps
#x8010
04
0000
rs ch2. enable terminal resistance
ps
#x8010
05
0000
rs ch2. enable send fifo date continuous
ps
#x8010
06
0100
rs ch2. enable transfer rate optimization
bit2
2
dint
32
int
16
array [0..3] of byte
usint
32
0
4
udint
32
uint
16
usint
8
dt0802en16
uint
16
1200 baud
1
2400 baud
2
4800 baud
3
9600 baud
4
19200 baud
5
38400 baud
6
57600 baud
7
115200 baud
8
230400 baud
9
dt0803en16
uint
16
7n2
1
7o1
2
7o2
3
7e1
4
7e2
5
8n1
6
8n2
7
8o1
8
8o2
9
8e1
10
8e2
11
dt0804en16
uint
16
disable
0
enable
1
bool
1
dt0801en16
uint
16
rs485
0
rs232
1
rs422
2
dt8000
112
0
subindex 000
usint
8
0
ro
o
1
physics connection
dt0801en16
16
16
rw
1
2
baud rate
dt0802en16
16
32
rw
1
3
data frame
dt0803en16
16
48
rw
1
4
enable terminal resistance
dt0804en16
16
64
rw
1
5
enable send fifo date continuous
dt0804en16
16
80
rw
1
6
enable transfer rate optimization
dt0804en16
16
96
rw
1
dt8001
48
0
subindex 000
usint
8
0
ro
o
1
data bytes in send buffer
uint
16
16
ro
2
data bytes in receive buffer
uint
16
32
ro
dt8010
112
0
subindex 000
usint
8
0
ro
o
1
physics connection
dt0801en16
16
16
rw
1
2
baud rate
dt0802en16
16
32
rw
1
3
data frame
dt0803en16
16
48
rw
1
4
enable terminal resistance
dt0804en16
16
64
rw
1
5
enable send fifo date continuous
dt0804en16
16
80
rw
1
6
enable transfer rate optimization
dt0804en16
16
96
rw
1
dt8011
48
0
subindex 000
usint
8
0
ro
o
1
data bytes in send buffer
uint
16
16
ro
2
data bytes in receive buffer
uint
16
32
ro
hcqx-rs02-d4-m
rs02-d4-m,2ch,rs232/422/485
#x1600
ch.1 output data 0 process data mapping
#x7000
1
16
ch.1 output data 0 buffer 0
uint
#x7000
2
16
ch.1 output data 0 buffer 1
uint
#x7000
3
16
ch.1 output data 0 buffer 2
uint
#x7000
4
16
ch.1 output data 0 buffer 3
uint
#x1601
ch.1 output data 1 process data mapping
#x7010
1
16
ch.1 output data 1 buffer 0
uint
#x7010
2
16
ch.1 output data 1 buffer 1
uint
#x7010
3
16
ch.1 output data 1 buffer 2
uint
#x7010
4
16
ch.1 output data 1 buffer 3
uint
#x1602
ch.1 output data 2 process data mapping
#x7020
1
16
ch.1 output data 2 buffer 0
uint
#x7020
2
16
ch.1 output data 2 buffer 1
uint
#x7020
3
16
ch.1 output data 2 buffer 2
uint
#x7020
4
16
ch.1 output data 2 buffer 3
uint
#x1603
ch.1 output data 3 process data mapping
#x7030
1
16
ch.1 output data 3 buffer 0
uint
#x7030
2
16
ch.1 output data 3 buffer 1
uint
#x7030
3
16
ch.1 output data 3 buffer 2
uint
#x7030
4
16
ch.1 output data 3 buffer 3
uint
#x1604
ch.2 output data 0 process data mapping
#x7040
1
16
ch.2 output data 0 buffer 0
uint
#x7040
2
16
ch.2 output data 0 buffer 1
uint
#x7040
3
16
ch.2 output data 0 buffer 2
uint
#x7040
4
16
ch.2 output data 0 buffer 3
uint
#x1605
ch.2 output data 1 process data mapping
#x7050
1
16
ch.2 output data 1 buffer 0
uint
#x7050
2
16
ch.2 output data 1 buffer 1
uint
#x7050
3
16
ch.2 output data 1 buffer 2
uint
#x7050
4
16
ch.2 output data 1 buffer 3
uint
#x1606
ch.2 output data 2 process data mapping
#x7060
1
16
ch.2 output data 2 buffer 0
uint
#x7060
2
16
ch.2 output data 2 buffer 1
uint
#x7060
3
16
ch.2 output data 2 buffer 2
uint
#x7060
4
16
ch.2 output data 2 buffer 3
uint
#x1607
ch.2 output data 3 process data mapping
#x7070
1
16
ch.2 output data 3 buffer 0
uint
#x7070
2
16
ch.2 output data 3 buffer 1
uint
#x7070
3
16
ch.2 output data 3 buffer 2
uint
#x7070
4
16
ch.2 output data 3 buffer 3
uint
#x1a00
ch.1 input data 0 process data mapping
#x6000
1
16
ch.1 input data 0 buffer 0
uint
#x6000
2
16
ch.1 input data 0 buffer 1
uint
#x6000
3
16
ch.1 input data 0 buffer 2
uint
#x6000
4
16
ch.1 input data 0 buffer 3
uint
#x6001
1
16
ch.1 input data 0 status
uint
#x1a01
ch.1 input data 1 process data mapping
#x6010
1
16
ch.1 input data 1 buffer 0
uint
#x6010
2
16
ch.1 input data 1 buffer 1
uint
#x6010
3
16
ch.1 input data 1 buffer 2
uint
#x6010
4
16
ch.1 input data 1 buffer 3
uint
#x6011
1
16
ch.1 input data 1 status
uint
#x1a02
ch.1 input data 2 process data mapping
#x6020
1
16
ch.1 input data 2 buffer 0
uint
#x6020
2
16
ch.1 input data 2 buffer 1
uint
#x6020
3
16
ch.1 input data 2 buffer 2
uint
#x6020
4
16
ch.1 input data 2 buffer 3
uint
#x6021
1
16
ch.1 input data 2 status
uint
#x1a03
ch.1 input data 3 process data mapping
#x6030
1
16
ch.1 input data 3 buffer 0
uint
#x6030
2
16
ch.1 input data 3 buffer 1
uint
#x6030
3
16
ch.1 input data 3 buffer 2
uint
#x6030
4
16
ch.1 input data 3 buffer 3
uint
#x6031
1
16
ch.1 input data 3 status
uint
#x1a04
ch.1 output data 0 status process data mapping
#x6041
1
16
ch.1 output data 0 status
uint
#x1a05
ch.1 output data 1 status process data mapping
#x6051
1
16
ch.1 output data 1 status
uint
#x1a06
ch.1 output data 2 status process data mapping
#x6061
1
16
ch.1 output data 2 status
uint
#x1a07
ch.1 output data 3 status process data mapping
#x6071
1
16
ch.1 output data 3 status
uint
#x1a08
ch.2 input data 0 process data mapping
#x6080
1
16
ch.2 input data 0 buffer 0
uint
#x6080
2
16
ch.2 input data 0 buffer 1
uint
#x6080
3
16
ch.2 input data 0 buffer 2
uint
#x6080
4
16
ch.2 input data 0 buffer 3
uint
#x6081
1
16
ch.2 input data 0 status
uint
#x1a09
ch.2 input data 1 process data mapping
#x6090
1
16
ch.2 input data 1 buffer 0
uint
#x6090
2
16
ch.2 input data 1 buffer 1
uint
#x6090
3
16
ch.2 input data 1 buffer 2
uint
#x6090
4
16
ch.2 input data 1 buffer 3
uint
#x6091
1
16
ch.2 input data 1 status
uint
#x1a0a
ch.2 input data 2 process data mapping
#x60a0
1
16
ch.2 input data 2 buffer 0
uint
#x60a0
2
16
ch.2 input data 2 buffer 1
uint
#x60a0
3
16
ch.2 input data 2 buffer 2
uint
#x60a0
4
16
ch.2 input data 2 buffer 3
uint
#x60a1
1
16
ch.2 input data 2 status
uint
#x1a0b
ch.2 input data 3 process data mapping
#x60b0
1
16
ch.2 input data 3 buffer 0
uint
#x60b0
2
16
ch.2 input data 3 buffer 1
uint
#x60b0
3
16
ch.2 input data 3 buffer 2
uint
#x60b0
4
16
ch.2 input data 3 buffer 3
uint
#x60b1
1
16
ch.2 input data 3 status
uint
#x1a0c
ch.2 output data 0 status process data mapping
#x60c1
1
16
ch.2 output data 0 status
uint
#x1a0d
ch.2 output data 1 status process data mapping
#x60d1
1
16
ch.2 output data 1 status
uint
#x1a0e
ch.2 output data 2 status process data mapping
#x60e1
1
16
ch.2 output data 2 status
uint
#x1a0f
ch.2 output data 3 status process data mapping
#x60f1
1
16
ch.2 output data 3 status
uint
ps
#x8000
01
0000
rs-m ch1.physics connection
ps
#x8000
02
0400
rs-m ch1.baud rate
ps
#x8000
03
0400
rs-m ch1.data frame
ps
#x8000
04
0000
rs-m ch1.enable terminal resistance
ps
#x8001
01
0000
rs-m ch2.physics connection
ps
#x8001
02
0400
rs-m ch2.baud rate
ps
#x8001
03
0400
rs-m ch2.data frame
ps
#x8001
04
0000
rs-m ch2.enable terminal resistance
dt8000
80
0
subindex 000
usint
8
0
ro
o
1
physics connection
dt0801en16
16
16
rw
1
2
baud rate
dt0802en16
16
32
rw
1
3
data frame
dt0803en16
16
48
rw
1
4
enable terminal resistance
dt0806en16
16
64
rw
1
dt8001
80
0
subindex 000
usint
8
0
ro
o
1
physics connection
dt0801en16
16
16
rw
1
2
baud rate
dt0802en16
16
32
rw
1
3
data frame
dt0803en16
16
48
rw
1
4
enable terminal resistance
dt0806en16
16
64
rw
1
dt8010
112
0
subindex 000
usint
8
0
ro
o
1
slave id
uint
16
16
rw
1
2
function code
dt0804en16
16
32
rw
1
3
start address
uint
16
48
rw
1
4
quantity
uint
16
64
rw
1
5
response time
uint
16
80
rw
1
6
interval time
uint
16
96
rw
1
dt8011
112
0
subindex 000
usint
8
0
ro
o
1
slave id
uint
16
16
rw
1
2
function code
dt0804en16
16
32
rw
1
3
start address
uint
16
48
rw
1
4
quantity
uint
16
64
rw
1
5
response time
uint
16
80
rw
1
6
interval time
uint
16
96
rw
1
dt8012
112
0
subindex 000
usint
8
0
ro
o
1
slave id
uint
16
16
rw
1
2
function code
dt0804en16
16
32
rw
1
3
start address
uint
16
48
rw
1
4
quantity
uint
16
64
rw
1
5
response time
uint
16
80
rw
1
6
interval time
uint
16
96
rw
1
dt8013
112
0
subindex 000
usint
8
0
ro
o
1
slave id
uint
16
16
rw
1
2
function code
dt0804en16
16
32
rw
1
3
start address
uint
16
48
rw
1
4
quantity
uint
16
64
rw
1
5
response time
uint
16
80
rw
1
6
interval time
uint
16
96
rw
1
dt8014
112
0
subindex 000
usint
8
0
ro
o
1
slave id
uint
16
16
rw
1
2
function code
dt0805en16
16
32
rw
1
3
start address
uint
16
48
rw
1
4
quantity
uint
16
64
rw
1
5
response time
uint
16
80
rw
1
6
interval time
uint
16
96
rw
1
dt8015
112
0
subindex 000
usint
8
0
ro
o
1
slave id
uint
16
16
rw
1
2
function code
dt0805en16
16
32
rw
1
3
start address
uint
16
48
rw
1
4
quantity
uint
16
64
rw
1
5
response time
uint
16
80
rw
1
6
interval time
uint
16
96
rw
1
dt8016
112
0
subindex 000
usint
8
0
ro
o
1
slave id
uint
16
16
rw
1
2
function code
dt0805en16
16
32
rw
1
3
start address
uint
16
48
rw
1
4
quantity
uint
16
64
rw
1
5
response time
uint
16
80
rw
1
6
interval time
uint
16
96
rw
1
dt8017
112
0
subindex 000
usint
8
0
ro
o
1
slave id
uint
16
16
rw
1
2
function code
dt0805en16
16
32
rw
1
3
start address
uint
16
48
rw
1
4
quantity
uint
16
64
rw
1
5
response time
uint
16
80
rw
1
6
interval time
uint
16
96
rw
1
dt8020
112
0
subindex 000
usint
8
0
ro
o
1
slave id
uint
16
16
rw
1
2
function code
dt0804en16
16
32
rw
1
3
start address
uint
16
48
rw
1
4
quantity
uint
16
64
rw
1
5
response time
uint
16
80
rw
1
6
interval time
uint
16
96
rw
1
dt8021
112
0
subindex 000
usint
8
0
ro
o
1
slave id
uint
16
16
rw
1
2
function code
dt0804en16
16
32
rw
1
3
start address
uint
16
48
rw
1
4
quantity
uint
16
64
rw
1
5
response time
uint
16
80
rw
1
6
interval time
uint
16
96
rw
1
dt8022
112
0
subindex 000
usint
8
0
ro
o
1
slave id
uint
16
16
rw
1
2
function code
dt0804en16
16
32
rw
1
3
start address
uint
16
48
rw
1
4
quantity
uint
16
64
rw
1
5
response time
uint
16
80
rw
1
6
interval time
uint
16
96
rw
1
dt8023
112
0
subindex 000
usint
8
0
ro
o
1
slave id
uint
16
16
rw
1
2
function code
dt0804en16
16
32
rw
1
3
start address
uint
16
48
rw
1
4
quantity
uint
16
64
rw
1
5
response time
uint
16
80
rw
1
6
interval time
uint
16
96
rw
1
dt8024
112
0
subindex 000
usint
8
0
ro
o
1
slave id
uint
16
16
rw
1
2
function code
dt0805en16
16
32
rw
1
3
start address
uint
16
48
rw
1
4
quantity
uint
16
64
rw
1
5
response time
uint
16
80
rw
1
6
interval time
uint
16
96
rw
1
dt8025
112
0
subindex 000
usint
8
0
ro
o
1
slave id
uint
16
16
rw
1
2
function code
dt0805en16
16
32
rw
1
3
start address
uint
16
48
rw
1
4
quantity
uint
16
64
rw
1
5
response time
uint
16
80
rw
1
6
interval time
uint
16
96
rw
1
dt8026
112
0
subindex 000
usint
8
0
ro
o
1
slave id
uint
16
16
rw
1
2
function code
dt0805en16
16
32
rw
1
3
start address
uint
16
48
rw
1
4
quantity
uint
16
64
rw
1
5
response time
uint
16
80
rw
1
6
interval time
uint
16
96
rw
1
dt8027
112
0
subindex 000
usint
8
0
ro
o
1
slave id
uint
16
16
rw
1
2
function code
dt0805en16
16
32
rw
1
3
start address
uint
16
48
rw
1
4
quantity
uint
16
64
rw
1
5
response time
uint
16
80
rw
1
6
interval time
uint
16
96
rw
1
bit2
2
dint
32
int
16
array [0..3] of byte
usint
32
0
4
uint
16
usint
8
udint
32
string(20)
160
string(5)
40
bool
1
dt0801en16
uint
16
rs485
0
rs232
1
rs422
2
dt0802en16
uint
16
1200 baud
1
2400 baud
2
4800 baud
3
9600 baud
4
19200 baud
5
38400 baud
6
57600 baud
7
115200 baud
8
230400 baud
9
dt0803en16
uint
16
8n1
0
8n2
1
8o1
2
8o2
3
8e1
4
8e2
5
dt0804en16
uint
16
none
0
01 read coil
1
02 read discrete inputs
2
03 read holding registers
3
04 read input registers
4
dt0805en16
uint
16
none
0
05 write single coil
5
06 write single register
6
15 write multiple coil
15
16 write multiple registers
16
dt0806en16
uint
16
disable
0
enable
1
hcqx-ad08-d4
ad08-d4,8ch,input /-10v diff,0~20ma diff,16 bit
#x1600
rxpdo-map1
#x7000
1
32
ad status clear
udint
#x1a00
txpdo-map1
#x6000
1
32
ad status
udint
#x1a01
txpdo-map2
#x6001
1
16
ad ch1.input
int
#x6011
1
16
ad ch2.input
int
#x6021
1
16
ad ch3.input
int
#x6031
1
16
ad ch4.input
int
#x6041
1
16
ad ch5.input
int
#x6051
1
16
ad ch6.input
int
#x6061
1
16
ad ch7.input
int
#x6071
1
16
ad ch8.input
int
ps
#x8000
01
00
ad ch1. input mode; 0:-10~10v; 1:0~10v; 2:-5~5v; 3:0~5v; 4:1~5v; 5:0~20ma; 6:4~20ma
ps
#x8000
02
01
ad ch1. enable channel
ps
#x8010
01
00
ad ch2. input mode; 0:-10~10v; 1:0~10v; 2:-5~5v; 3:0~5v; 4:1~5v; 5:0~20ma; 6:4~20ma
ps
#x8010
02
01
ad ch2. enable channel
ps
#x8020
01
00
ad ch3. input mode; 0:-10~10v; 1:0~10v; 2:-5~5v; 3:0~5v; 4:1~5v; 5:0~20ma; 6:4~20ma
ps
#x8020
02
01
ad ch3. enable channel
ps
#x8030
01
00
ad ch4. input mode; 0:-10~10v; 1:0~10v; 2:-5~5v; 3:0~5v; 4:1~5v; 5:0~20ma; 6:4~20ma
ps
#x8030
02
01
ad ch4. enable channel
ps
#x8040
01
00
ad ch5. input mode; 0:-10~10v; 1:0~10v; 2:-5~5v; 3:0~5v; 4:1~5v; 5:0~20ma; 6:4~20ma
ps
#x8040
02
01
ad ch5. enable channel
ps
#x8050
01
00
ad ch6. input mode; 0:-10~10v; 1:0~10v; 2:-5~5v; 3:0~5v; 4:1~5v; 5:0~20ma; 6:4~20ma
ps
#x8050
02
01
ad ch6. enable channel
ps
#x8060
01
00
ad ch7. input mode; 0:-10~10v; 1:0~10v; 2:-5~5v; 3:0~5v; 4:1~5v; 5:0~20ma; 6:4~20ma
ps
#x8060
02
01
ad ch7. enable channel
ps
#x8070
01
00
ad ch8. input mode; 0:-10~10v; 1:0~10v; 2:-5~5v; 3:0~5v; 4:1~5v; 5:0~20ma; 6:4~20ma
ps
#x8070
02
01
ad ch8. enable channel
5001
usint
8
udint
32
uint
16
ulint
64
bool
1
int
16
dt8000
144
0
subindex 000
usint
8
0
ro
1
input mode
uint
16
16
rw
1
2
enable channel
bool
1
32
rw
1
3
enable user scale
bool
1
33
rw
1
4
enable peak monitor
bool
1
34
rw
1
5
enable filter
bool
1
35
rw
1
6
enable minimum limit
bool
1
36
rw
1
7
enable maximum limit
bool
1
37
rw
1
8
enable mutation detection
bool
1
38
rw
1
10
user scale offset
int
16
48
rw
1
11
user scale gain
int
16
64
rw
1
12
minimum limit value
int
16
80
rw
1
13
maximum limit value
int
16
96
rw
1
14
filter settings
uint
16
112
rw
1
15
mutation detection value
uint
16
128
rw
1
dt8001
48
0
subindex 000
usint
8
0
ro
1
1
ch1.maximum value
int
16
16
ro
t
2
ch1.minimum value
int
16
32
ro
t
dt8010
144
0
subindex 000
usint
8
0
ro
1
input mode
uint
16
16
rw
1
2
enable channel
bool
1
32
rw
1
3
enable user scale
bool
1
33
rw
1
4
enable peak monitor
bool
1
34
rw
1
5
enable filter
bool
1
35
rw
1
6
enable minimum limit
bool
1
36
rw
1
7
enable maximum limit
bool
1
37
rw
1
8
enable mutation detection
bool
1
38
rw
1
10
user scale offset
int
16
48
rw
1
11
user scale gain
int
16
64
rw
1
12
minimum limit value
int
16
80
rw
1
13
maximum limit value
int
16
96
rw
1
14
filter settings
uint
16
112
rw
1
15
mutation detection value
uint
16
128
rw
1
dt8011
48
0
subindex 000
usint
8
0
ro
1
ch2.maximum value
int
16
16
ro
t
2
ch2.minimum value
int
16
32
ro
t
dt8020
144
0
subindex 000
usint
8
0
ro
1
input mode
uint
16
16
rw
1
2
enable channel
bool
1
32
rw
1
3
enable user scale
bool
1
33
rw
1
4
enable peak monitor
bool
1
34
rw
1
5
enable filter
bool
1
35
rw
1
6
enable minimum limit
bool
1
36
rw
1
7
enable maximum limit
bool
1
37
rw
1
8
enable mutation detection
bool
1
38
rw
1
10
user scale offset
int
16
48
rw
1
11
user scale gain
int
16
64
rw
1
12
minimum limit value
int
16
80
rw
1
13
maximum limit value
int
16
96
rw
1
14
filter settings
uint
16
112
rw
1
15
mutation detection value
uint
16
128
rw
1
dt8021
48
0
subindex 000
usint
8
0
ro
1
ch3.maximum value
int
16
16
ro
t
2
ch3.minimum value
int
16
32
ro
t
dt8030
144
0
subindex 000
usint
8
0
ro
1
input mode
uint
16
16
rw
1
2
enable channel
bool
1
32
rw
1
3
enable user scale
bool
1
33
rw
1
4
enable peak monitor
bool
1
34
rw
1
5
enable filter
bool
1
35
rw
1
6
enable minimum limit
bool
1
36
rw
1
7
enable maximum limit
bool
1
37
rw
1
8
enable mutation detection
bool
1
38
rw
1
10
user scale offset
int
16
48
rw
1
11
user scale gain
int
16
64
rw
1
12
minimum limit value
int
16
80
rw
1
13
maximum limit value
int
16
96
rw
1
14
filter settings
uint
16
112
rw
1
15
mutation detection value
uint
16
128
rw
1
dt8031
48
0
subindex 000
usint
8
0
ro
1
ch4.maximum value
int
16
16
ro
t
2
ch4.minimum value
int
16
32
ro
t
dt8040
144
0
subindex 000
usint
8
0
ro
1
input mode
uint
16
16
rw
1
2
enable channel
bool
1
32
rw
1
3
enable user scale
bool
1
33
rw
1
4
enable peak monitor
bool
1
34
rw
1
5
enable filter
bool
1
35
rw
1
6
enable minimum limit
bool
1
36
rw
1
7
enable maximum limit
bool
1
37
rw
1
8
enable mutation detection
bool
1
38
rw
1
10
user scale offset
int
16
48
rw
1
11
user scale gain
int
16
64
rw
1
12
minimum limit value
int
16
80
rw
1
13
maximum limit value
int
16
96
rw
1
14
filter settings
uint
16
112
rw
1
15
mutation detection value
uint
16
128
rw
1
dt8041
48
0
subindex 000
usint
8
0
ro
1
ch5.maximum value
int
16
16
ro
t
2
ch5.minimum value
int
16
32
ro
t
dt8050
144
0
subindex 000
usint
8
0
ro
1
input mode
uint
16
16
rw
1
2
enable channel
bool
1
32
rw
1
3
enable user scale
bool
1
33
rw
1
4
enable peak monitor
bool
1
34
rw
1
5
enable filter
bool
1
35
rw
1
6
enable minimum limit
bool
1
36
rw
1
7
enable maximum limit
bool
1
37
rw
1
8
enable mutation detection
bool
1
38
rw
1
10
user scale offset
int
16
48
rw
1
11
user scale gain
int
16
64
rw
1
12
minimum limit value
int
16
80
rw
1
13
maximum limit value
int
16
96
rw
1
14
filter settings
uint
16
112
rw
1
15
mutation detection value
uint
16
128
rw
1
dt8051
48
0
subindex 000
usint
8
0
ro
1
ch6.maximum value
int
16
16
ro
t
2
ch6.minimum value
int
16
32
ro
t
dt8060
144
0
subindex 000
usint
8
0
ro
1
input mode
uint
16
16
rw
1
2
enable channel
bool
1
32
rw
1
3
enable user scale
bool
1
33
rw
1
4
enable peak monitor
bool
1
34
rw
1
5
enable filter
bool
1
35
rw
1
6
enable minimum limit
bool
1
36
rw
1
7
enable maximum limit
bool
1
37
rw
1
8
enable mutation detection
bool
1
38
rw
1
10
user scale offset
int
16
48
rw
1
11
user scale gain
int
16
64
rw
1
12
minimum limit value
int
16
80
rw
1
13
maximum limit value
int
16
96
rw
1
14
filter settings
uint
16
112
rw
1
15
mutation detection value
uint
16
128
rw
1
dt8061
48
0
subindex 000
usint
8
0
ro
1
ch7.maximum value
int
16
16
ro
t
2
ch7.minimum value
int
16
32
ro
t
dt8070
144
0
subindex 000
usint
8
0
ro
1
input mode
uint
16
16
rw
1
2
enable channel
bool
1
32
rw
1
3
enable user scale
bool
1
33
rw
1
4
enable peak monitor
bool
1
34
rw
1
5
enable filter
bool
1
35
rw
1
6
enable minimum limit
bool
1
36
rw
1
7
enable maximum limit
bool
1
37
rw
1
8
enable mutation detection
bool
1
38
rw
1
10
user scale offset
int
16
48
rw
1
11
user scale gain
int
16
64
rw
1
12
minimum limit value
int
16
80
rw
1
13
maximum limit value
int
16
96
rw
1
14
filter settings
uint
16
112
rw
1
15
mutation detection value
uint
16
128
rw
1
dt8071
48
0
subindex 000
usint
8
0
ro
1
ch8.maximum value
int
16
16
ro
t
2
ch8.minimum value
int
16
32
ro
t
hcqx-oc08-d4
oc08-d4,8 digital output,dc24v,2a/16a
#x1600
output byte
#x1601
#x7000
1
8
output 1
byte
0
1
8
#x1601
output bits
#x1600
#x7001
1
1
output bit0
bool
#x7001
2
1
output bit1
bool
#x7001
3
1
output bit2
bool
#x7001
4
1
output bit3
bool
#x7001
5
1
output bit4
bool
#x7001
6
1
output bit5
bool
#x7001
7
1
output bit6
bool
#x7001
8
1
output bit7
bool
0
9
1
output bit8
bool
0
9
1
output bit9
bool
0
11
1
output bit10
bool
0
12
1
output bit11
bool
0
13
1
output bit12
bool
0
14
1
output bit13
bool
0
15
1
output bit14
bool
0
16
1
output bit15
bool
uint
16
usint
8
dt8000
80
0
subindex 000
usint
8
0
ro
o
1
abnormal mode q00
usint
8
16
rw
o
1
2
abnormal mode q01
usint
8
24
rw
o
1
3
abnormal mode q02
usint
8
32
rw
o
1
4
abnormal mode q03
usint
8
40
rw
o
1
5
abnormal mode q10
usint
8
48
rw
o
1
6
abnormal mode q11
usint
8
56
rw
o
1
7
abnormal mode q12
usint
8
64
rw
o
1
8
abnormal mode q13
usint
8
72
rw
o
1